/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein
* is confidential and proprietary to MediaTek Inc. and/or its licensors.
* Without the prior written permission of MediaTek inc. and/or its licensors,
* any reproduction, modification, use or disclosure of MediaTek Software,
* and information contained herein, in whole or in part, shall be strictly prohibited.
*/
/* MediaTek Inc. (C) 2015. All rights reserved.
*
* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
* THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
* CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
* SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
* CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*/
#ifndef _GPIO_CFG_H_
#define _GPIO_CFG_H_

#include <platform/mt_typedefs.h>

typedef struct {
	S32 addr;
} PIN_addr;

typedef struct {
	S8 offset;
} PIN_offset;

PIN_addr IES_addr[] = {
	/* 0 */ {IOCFG_RM_BASE+0x000},
	/* 1 */ {IOCFG_RM_BASE+0x000},
	/* 2 */ {IOCFG_RM_BASE+0x000},
	/* 3 */ {IOCFG_RM_BASE+0x000},
	/* 4 */ {IOCFG_RM_BASE+0x000},
	/* 5 */ {IOCFG_RM_BASE+0x000},
	/* 6 */ {IOCFG_RM_BASE+0x000},
	/* 7 */ {IOCFG_RM_BASE+0x000},
	/* 8 */ {IOCFG_RM_BASE+0x000},
	/* 9 */ {IOCFG_RM_BASE+0x000},
	/* 10 */ {IOCFG_RM_BASE+0x000},
	/* 11 */ {IOCFG_LT_BASE+0x000},
	/* 12 */ {IOCFG_LT_BASE+0x000},
	/* 13 */ {IOCFG_LM_BASE+0x000},
	/* 14 */ {IOCFG_LM_BASE+0x000},
	/* 15 */ {IOCFG_LM_BASE+0x000},
	/* 16 */ {IOCFG_LM_BASE+0x000},
	/* 17 */ {IOCFG_LM_BASE+0x000},
	/* 18 */ {IOCFG_LM_BASE+0x000},
	/* 19 */ {IOCFG_LM_BASE+0x000},
	/* 20 */ {IOCFG_LM_BASE+0x000},
	/* 21 */ {IOCFG_LM_BASE+0x000},
	/* 22 */ {IOCFG_LM_BASE+0x000},
	/* 23 */ {IOCFG_LM_BASE+0x000},
	/* 24 */ {IOCFG_LM_BASE+0x000},
	/* 25 */ {IOCFG_LM_BASE+0x000},
	/* 26 */ {IOCFG_LM_BASE+0x000},
	/* 27 */ {IOCFG_LM_BASE+0x000},
	/* 28 */ {IOCFG_LM_BASE+0x000},
	/* 29 */ {IOCFG_LM_BASE+0x000},
	/* 30 */ {IOCFG_LM_BASE+0x000},
	/* 31 */ {IOCFG_LM_BASE+0x000},
	/* 32 */ {IOCFG_LM_BASE+0x000},
	/* 33 */ {IOCFG_LM_BASE+0x000},
	/* 34 */ {IOCFG_LM_BASE+0x000},
	/* 35 */ {IOCFG_LB_BASE+0x000},
	/* 36 */ {IOCFG_LB_BASE+0x000},
	/* 37 */ {IOCFG_LB_BASE+0x000},
	/* 38 */ {IOCFG_LB_BASE+0x000},
	/* 39 */ {IOCFG_LB_BASE+0x000},
	/* 40 */ {IOCFG_LB_BASE+0x000},
	/* 41 */ {IOCFG_LB_BASE+0x000},
	/* 42 */ {IOCFG_LB_BASE+0x000},
	/* 43 */ {IOCFG_LB_BASE+0x000},
	/* 44 */ {IOCFG_LB_BASE+0x000},
	/* 45 */ {IOCFG_LB_BASE+0x000},
	/* 46 */ {IOCFG_LB_BASE+0x000},
	/* 47 */ {IOCFG_LB_BASE+0x000},
	/* 48 */ {IOCFG_LB_BASE+0x000},
	/* 49 */ {IOCFG_LB_BASE+0x000},
	/* 50 */ {IOCFG_BL_BASE+0x000},
	/* 51 */ {IOCFG_BL_BASE+0x000},
	/* 52 */ {IOCFG_BL_BASE+0x000},
	/* 53 */ {IOCFG_BL_BASE+0x000},
	/* 54 */ {IOCFG_BL_BASE+0x000},
	/* 55 */ {IOCFG_BL_BASE+0x000},
	/* 56 */ {IOCFG_BL_BASE+0x000},
	/* 57 */ {IOCFG_BL_BASE+0x000},
	/* 58 */ {IOCFG_BL_BASE+0x000},
	/* 59 */ {IOCFG_BL_BASE+0x000},
	/* 60 */ {IOCFG_BL_BASE+0x000},
	/* 61 */ {IOCFG_RB_BASE+0x000},
	/* 62 */ {IOCFG_RB_BASE+0x000},
	/* 63 */ {IOCFG_RB_BASE+0x000},
	/* 64 */ {IOCFG_RB_BASE+0x000},
	/* 65 */ {IOCFG_RB_BASE+0x000},
	/* 66 */ {IOCFG_RB_BASE+0x000},
	/* 67 */ {IOCFG_RB_BASE+0x000},
	/* 68 */ {IOCFG_RB_BASE+0x000},
	/* 69 */ {IOCFG_RB_BASE+0x000},
	/* 70 */ {IOCFG_RB_BASE+0x000},
	/* 71 */ {IOCFG_RB_BASE+0x000},
	/* 72 */ {IOCFG_RB_BASE+0x000},
	/* 73 */ {IOCFG_RB_BASE+0x000},
	/* 74 */ {IOCFG_RB_BASE+0x000},
	/* 75 */ {IOCFG_RB_BASE+0x000},
	/* 76 */ {IOCFG_RB_BASE+0x000},
	/* 77 */ {IOCFG_RB_BASE+0x000},
	/* 78 */ {IOCFG_RB_BASE+0x000},
	/* 79 */ {IOCFG_RB_BASE+0x000},
	/* 80 */ {IOCFG_RB_BASE+0x000},
	/* 81 */ {IOCFG_RB_BASE+0x000},
	/* 82 */ {IOCFG_RB_BASE+0x000},
	/* 83 */ {IOCFG_RB_BASE+0x000},
	/* 84 */ {IOCFG_RB_BASE+0x000},
	/* 85 */ {IOCFG_RB_BASE+0x000},
	/* 86 */ {IOCFG_RB_BASE+0x000},
	/* 87 */ {IOCFG_RB_BASE+0x000},
	/* 88 */ {IOCFG_RB_BASE+0x000},
	/* 89 */ {IOCFG_RM_BASE+0x000},
	/* 90 */ {IOCFG_RM_BASE+0x000},
	/* 91 */ {IOCFG_RM_BASE+0x000},
	/* 92 */ {IOCFG_RM_BASE+0x000},
	/* 93 */ {IOCFG_RM_BASE+0x000},
	/* 94 */ {IOCFG_RM_BASE+0x000},
	/* 95 */ {IOCFG_RM_BASE+0x000},
	/* 96 */ {IOCFG_RM_BASE+0x000},
	/* 97 */ {IOCFG_RM_BASE+0x000},
	/* 98 */ {IOCFG_RM_BASE+0x000},
	/* 99 */ {IOCFG_RM_BASE+0x000},
	/* 100 */ {IOCFG_RM_BASE+0x000},
	/* 101 */ {IOCFG_RM_BASE+0x000},
	/* 102 */ {IOCFG_RM_BASE+0x000},
	/* 103 */ {IOCFG_RM_BASE+0x000},
	/* 104 */ {IOCFG_RM_BASE+0x000},
	/* 105 */ {IOCFG_RM_BASE+0x000},
	/* 106 */ {IOCFG_RM_BASE+0x000},
	/* 107 */ {IOCFG_RT_BASE+0x000},
	/* 108 */ {IOCFG_RT_BASE+0x000},
	/* 109 */ {IOCFG_RT_BASE+0x000},
	/* 110 */ {IOCFG_RT_BASE+0x000},
	/* 111 */ {IOCFG_RT_BASE+0x000},
	/* 112 */ {IOCFG_RT_BASE+0x000},
	/* 113 */ {IOCFG_RT_BASE+0x000},
	/* 114 */ {IOCFG_RT_BASE+0x000},
	/* 115 */ {IOCFG_RT_BASE+0x000},
	/* 116 */ {IOCFG_RT_BASE+0x000},
	/* 117 */ {IOCFG_RT_BASE+0x000},
	/* 118 */ {IOCFG_RT_BASE+0x000},
	/* 119 */ {IOCFG_RT_BASE+0x000},
	/* 120 */ {IOCFG_RT_BASE+0x000},
	/* 121 */ {IOCFG_RT_BASE+0x000},
	/* 122 */ {IOCFG_TL_BASE+0x000},
	/* 123 */ {IOCFG_TL_BASE+0x000},
	/* 124 */ {IOCFG_TL_BASE+0x000},
	/* 125 */ {IOCFG_TL_BASE+0x000},
	/* 126 */ {IOCFG_TL_BASE+0x000},
	/* 127 */ {IOCFG_TL_BASE+0x000},
	/* 128 */ {IOCFG_TL_BASE+0x000},
	/* 129 */ {IOCFG_TL_BASE+0x000},
	/* 130 */ {IOCFG_TL_BASE+0x000},
	/* 131 */ {IOCFG_TL_BASE+0x000},
	/* 132 */ {IOCFG_TL_BASE+0x000},
	/* 133 */ {IOCFG_TL_BASE+0x000},
	/* 134 */ {IOCFG_LT_BASE+0x000},
	/* 135 */ {IOCFG_LT_BASE+0x000},
	/* 136 */ {IOCFG_LT_BASE+0x000},
	/* 137 */ {IOCFG_LT_BASE+0x000},
	/* 138 */ {IOCFG_LT_BASE+0x000},
	/* 139 */ {IOCFG_LT_BASE+0x000},
	/* 140 */ {IOCFG_LT_BASE+0x000},
	/* 141 */ {IOCFG_LT_BASE+0x000},
	/* 142 */ {IOCFG_LT_BASE+0x000},
	/* 143 */ {IOCFG_LT_BASE+0x000},
	/* 144 */ {IOCFG_LT_BASE+0x000},
	/* 145 */ {IOCFG_LT_BASE+0x000},
	/* 146 */ {IOCFG_LT_BASE+0x000},
	/* 147 */ {IOCFG_LT_BASE+0x000},
	/* 148 */ {IOCFG_LT_BASE+0x000},
	/* 149 */ {IOCFG_LT_BASE+0x000},
	/* 150 */ {IOCFG_BL_BASE+0x000},
	/* 151 */ {IOCFG_BL_BASE+0x000}
};


PIN_offset IES_offset[] = {
	/* 0 */ {3},
	/* 1 */ {3},
	/* 2 */ {3},
	/* 3 */ {3},
	/* 4 */ {4},
	/* 5 */ {4},
	/* 6 */ {4},
	/* 7 */ {4},
	/* 8 */ {0},
	/* 9 */ {11},
	/* 10 */ {11},
	/* 11 */ {3},
	/* 12 */ {7},
	/* 13 */ {0},
	/* 14 */ {0},
	/* 15 */ {0},
	/* 16 */ {0},
	/* 17 */ {1},
	/* 18 */ {1},
	/* 19 */ {1},
	/* 20 */ {1},
	/* 21 */ {2},
	/* 22 */ {2},
	/* 23 */ {2},
	/* 24 */ {2},
	/* 25 */ {3},
	/* 26 */ {3},
	/* 27 */ {3},
	/* 28 */ {3},
	/* 29 */ {4},
	/* 30 */ {5},
	/* 31 */ {6},
	/* 32 */ {5},
	/* 33 */ {5},
	/* 34 */ {5},
	/* 35 */ {0},
	/* 36 */ {0},
	/* 37 */ {0},
	/* 38 */ {1},
	/* 39 */ {1},
	/* 40 */ {1},
	/* 41 */ {2},
	/* 42 */ {2},
	/* 43 */ {3},
	/* 44 */ {3},
	/* 45 */ {3},
	/* 46 */ {4},
	/* 47 */ {4},
	/* 48 */ {5},
	/* 49 */ {5},
	/* 50 */ {0},
	/* 51 */ {0},
	/* 52 */ {1},
	/* 53 */ {1},
	/* 54 */ {1},
	/* 55 */ {1},
	/* 56 */ {1},
	/* 57 */ {1},
	/* 58 */ {2},
	/* 59 */ {2},
	/* 60 */ {2},
	/* 61 */ {0},
	/* 62 */ {0},
	/* 63 */ {0},
	/* 64 */ {0},
	/* 65 */ {1},
	/* 66 */ {1},
	/* 67 */ {1},
	/* 68 */ {1},
	/* 69 */ {2},
	/* 70 */ {2},
	/* 71 */ {2},
	/* 72 */ {3},
	/* 73 */ {3},
	/* 74 */ {3},
	/* 75 */ {3},
	/* 76 */ {3},
	/* 77 */ {4},
	/* 78 */ {4},
	/* 79 */ {4},
	/* 80 */ {4},
	/* 81 */ {5},
	/* 82 */ {6},
	/* 83 */ {6},
	/* 84 */ {5},
	/* 85 */ {7},
	/* 86 */ {7},
	/* 87 */ {7},
	/* 88 */ {7},
	/* 89 */ {10},
	/* 90 */ {1},
	/* 91 */ {2},
	/* 92 */ {2},
	/* 93 */ {2},
	/* 94 */ {2},
	/* 95 */ {5},
	/* 96 */ {5},
	/* 97 */ {6},
	/* 98 */ {6},
	/* 99 */ {7},
	/* 100 */ {8},
	/* 101 */ {9},
	/* 102 */ {9},
	/* 103 */ {12},
	/* 104 */ {12},
	/* 105 */ {13},
	/* 106 */ {13},
	/* 107 */ {0},
	/* 108 */ {0},
	/* 109 */ {0},
	/* 110 */ {1},
	/* 111 */ {1},
	/* 112 */ {2},
	/* 113 */ {2},
	/* 114 */ {2},
	/* 115 */ {2},
	/* 116 */ {3},
	/* 117 */ {4},
	/* 118 */ {5},
	/* 119 */ {3},
	/* 120 */ {3},
	/* 121 */ {3},
	/* 122 */ {0},
	/* 123 */ {1},
	/* 124 */ {2},
	/* 125 */ {1},
	/* 126 */ {1},
	/* 127 */ {1},
	/* 128 */ {1},
	/* 129 */ {1},
	/* 130 */ {1},
	/* 131 */ {3},
	/* 132 */ {1},
	/* 133 */ {4},
	/* 134 */ {0},
	/* 135 */ {1},
	/* 136 */ {2},
	/* 137 */ {2},
	/* 138 */ {2},
	/* 139 */ {2},
	/* 140 */ {2},
	/* 141 */ {2},
	/* 142 */ {2},
	/* 143 */ {2},
	/* 144 */ {4},
	/* 145 */ {4},
	/* 146 */ {4},
	/* 147 */ {4},
	/* 148 */ {5},
	/* 149 */ {6},
	/* 150 */ {2},
	/* 151 */ {2}
};


PIN_addr SMT_addr[] = {
	/* 0 */ {IOCFG_RM_BASE+0x010},
	/* 1 */ {IOCFG_RM_BASE+0x010},
	/* 2 */ {IOCFG_RM_BASE+0x010},
	/* 3 */ {IOCFG_RM_BASE+0x010},
	/* 4 */ {IOCFG_RM_BASE+0x010},
	/* 5 */ {IOCFG_RM_BASE+0x010},
	/* 6 */ {IOCFG_RM_BASE+0x010},
	/* 7 */ {IOCFG_RM_BASE+0x010},
	/* 8 */ {IOCFG_RM_BASE+0x010},
	/* 9 */ {IOCFG_RM_BASE+0x010},
	/* 10 */ {IOCFG_RM_BASE+0x010},
	/* 11 */ {IOCFG_LT_BASE+0x010},
	/* 12 */ {IOCFG_LT_BASE+0x010},
	/* 13 */ {IOCFG_LM_BASE+0x010},
	/* 14 */ {IOCFG_LM_BASE+0x010},
	/* 15 */ {IOCFG_LM_BASE+0x010},
	/* 16 */ {IOCFG_LM_BASE+0x010},
	/* 17 */ {IOCFG_LM_BASE+0x010},
	/* 18 */ {IOCFG_LM_BASE+0x010},
	/* 19 */ {IOCFG_LM_BASE+0x010},
	/* 20 */ {IOCFG_LM_BASE+0x010},
	/* 21 */ {IOCFG_LM_BASE+0x010},
	/* 22 */ {IOCFG_LM_BASE+0x010},
	/* 23 */ {IOCFG_LM_BASE+0x010},
	/* 24 */ {IOCFG_LM_BASE+0x010},
	/* 25 */ {IOCFG_LM_BASE+0x010},
	/* 26 */ {IOCFG_LM_BASE+0x010},
	/* 27 */ {IOCFG_LM_BASE+0x010},
	/* 28 */ {IOCFG_LM_BASE+0x010},
	/* 29 */ {IOCFG_LM_BASE+0x010},
	/* 30 */ {IOCFG_LM_BASE+0x010},
	/* 31 */ {IOCFG_LM_BASE+0x010},
	/* 32 */ {IOCFG_LM_BASE+0x010},
	/* 33 */ {IOCFG_LM_BASE+0x010},
	/* 34 */ {IOCFG_LM_BASE+0x010},
	/* 35 */ {IOCFG_LB_BASE+0x010},
	/* 36 */ {IOCFG_LB_BASE+0x010},
	/* 37 */ {IOCFG_LB_BASE+0x010},
	/* 38 */ {IOCFG_LB_BASE+0x010},
	/* 39 */ {IOCFG_LB_BASE+0x010},
	/* 40 */ {IOCFG_LB_BASE+0x010},
	/* 41 */ {IOCFG_LB_BASE+0x010},
	/* 42 */ {IOCFG_LB_BASE+0x010},
	/* 43 */ {IOCFG_LB_BASE+0x010},
	/* 44 */ {IOCFG_LB_BASE+0x010},
	/* 45 */ {IOCFG_LB_BASE+0x010},
	/* 46 */ {IOCFG_LB_BASE+0x010},
	/* 47 */ {IOCFG_LB_BASE+0x010},
	/* 48 */ {IOCFG_LB_BASE+0x010},
	/* 49 */ {IOCFG_LB_BASE+0x010},
	/* 50 */ {IOCFG_BL_BASE+0x010},
	/* 51 */ {IOCFG_BL_BASE+0x010},
	/* 52 */ {IOCFG_BL_BASE+0x010},
	/* 53 */ {IOCFG_BL_BASE+0x010},
	/* 54 */ {IOCFG_BL_BASE+0x010},
	/* 55 */ {IOCFG_BL_BASE+0x010},
	/* 56 */ {IOCFG_BL_BASE+0x010},
	/* 57 */ {IOCFG_BL_BASE+0x010},
	/* 58 */ {IOCFG_BL_BASE+0x010},
	/* 59 */ {IOCFG_BL_BASE+0x010},
	/* 60 */ {IOCFG_BL_BASE+0x010},
	/* 61 */ {IOCFG_RB_BASE+0x010},
	/* 62 */ {IOCFG_RB_BASE+0x010},
	/* 63 */ {IOCFG_RB_BASE+0x010},
	/* 64 */ {IOCFG_RB_BASE+0x010},
	/* 65 */ {IOCFG_RB_BASE+0x010},
	/* 66 */ {IOCFG_RB_BASE+0x010},
	/* 67 */ {IOCFG_RB_BASE+0x010},
	/* 68 */ {IOCFG_RB_BASE+0x010},
	/* 69 */ {IOCFG_RB_BASE+0x010},
	/* 70 */ {IOCFG_RB_BASE+0x010},
	/* 71 */ {IOCFG_RB_BASE+0x010},
	/* 72 */ {IOCFG_RB_BASE+0x010},
	/* 73 */ {IOCFG_RB_BASE+0x010},
	/* 74 */ {IOCFG_RB_BASE+0x010},
	/* 75 */ {IOCFG_RB_BASE+0x010},
	/* 76 */ {IOCFG_RB_BASE+0x010},
	/* 77 */ {IOCFG_RB_BASE+0x010},
	/* 78 */ {IOCFG_RB_BASE+0x010},
	/* 79 */ {IOCFG_RB_BASE+0x010},
	/* 80 */ {IOCFG_RB_BASE+0x010},
	/* 81 */ {IOCFG_RB_BASE+0x010},
	/* 82 */ {IOCFG_RB_BASE+0x010},
	/* 83 */ {IOCFG_RB_BASE+0x010},
	/* 84 */ {IOCFG_RB_BASE+0x010},
	/* 85 */ {IOCFG_RB_BASE+0x010},
	/* 86 */ {IOCFG_RB_BASE+0x010},
	/* 87 */ {IOCFG_RB_BASE+0x010},
	/* 88 */ {IOCFG_RB_BASE+0x010},
	/* 89 */ {IOCFG_RM_BASE+0x010},
	/* 90 */ {IOCFG_RM_BASE+0x010},
	/* 91 */ {IOCFG_RM_BASE+0x010},
	/* 92 */ {IOCFG_RM_BASE+0x010},
	/* 93 */ {IOCFG_RM_BASE+0x010},
	/* 94 */ {IOCFG_RM_BASE+0x010},
	/* 95 */ {IOCFG_RM_BASE+0x010},
	/* 96 */ {IOCFG_RM_BASE+0x010},
	/* 97 */ {IOCFG_RM_BASE+0x010},
	/* 98 */ {IOCFG_RM_BASE+0x010},
	/* 99 */ {IOCFG_RM_BASE+0x010},
	/* 100 */ {IOCFG_RM_BASE+0x010},
	/* 101 */ {IOCFG_RM_BASE+0x010},
	/* 102 */ {IOCFG_RM_BASE+0x010},
	/* 103 */ {IOCFG_RM_BASE+0x010},
	/* 104 */ {IOCFG_RM_BASE+0x010},
	/* 105 */ {IOCFG_RM_BASE+0x010},
	/* 106 */ {IOCFG_RM_BASE+0x010},
	/* 107 */ {IOCFG_RT_BASE+0x010},
	/* 108 */ {IOCFG_RT_BASE+0x010},
	/* 109 */ {IOCFG_RT_BASE+0x010},
	/* 110 */ {IOCFG_RT_BASE+0x010},
	/* 111 */ {IOCFG_RT_BASE+0x010},
	/* 112 */ {IOCFG_RT_BASE+0x010},
	/* 113 */ {IOCFG_RT_BASE+0x010},
	/* 114 */ {IOCFG_RT_BASE+0x010},
	/* 115 */ {IOCFG_RT_BASE+0x010},
	/* 116 */ {IOCFG_RT_BASE+0x010},
	/* 117 */ {IOCFG_RT_BASE+0x010},
	/* 118 */ {IOCFG_RT_BASE+0x010},
	/* 119 */ {IOCFG_RT_BASE+0x010},
	/* 120 */ {IOCFG_RT_BASE+0x010},
	/* 121 */ {IOCFG_RT_BASE+0x010},
	/* 122 */ {IOCFG_TL_BASE+0x010},
	/* 123 */ {IOCFG_TL_BASE+0x010},
	/* 124 */ {IOCFG_TL_BASE+0x010},
	/* 125 */ {IOCFG_TL_BASE+0x010},
	/* 126 */ {IOCFG_TL_BASE+0x010},
	/* 127 */ {IOCFG_TL_BASE+0x010},
	/* 128 */ {IOCFG_TL_BASE+0x010},
	/* 129 */ {IOCFG_TL_BASE+0x010},
	/* 130 */ {IOCFG_TL_BASE+0x010},
	/* 131 */ {IOCFG_TL_BASE+0x010},
	/* 132 */ {IOCFG_TL_BASE+0x010},
	/* 133 */ {IOCFG_TL_BASE+0x010},
	/* 134 */ {IOCFG_LT_BASE+0x010},
	/* 135 */ {IOCFG_LT_BASE+0x010},
	/* 136 */ {IOCFG_LT_BASE+0x010},
	/* 137 */ {IOCFG_LT_BASE+0x010},
	/* 138 */ {IOCFG_LT_BASE+0x010},
	/* 139 */ {IOCFG_LT_BASE+0x010},
	/* 140 */ {IOCFG_LT_BASE+0x010},
	/* 141 */ {IOCFG_LT_BASE+0x010},
	/* 142 */ {IOCFG_LT_BASE+0x010},
	/* 143 */ {IOCFG_LT_BASE+0x010},
	/* 144 */ {IOCFG_LT_BASE+0x010},
	/* 145 */ {IOCFG_LT_BASE+0x010},
	/* 146 */ {IOCFG_LT_BASE+0x010},
	/* 147 */ {IOCFG_LT_BASE+0x010},
	/* 148 */ {IOCFG_LT_BASE+0x010},
	/* 149 */ {IOCFG_LT_BASE+0x010},
	/* 150 */ {IOCFG_BL_BASE+0x010},
	/* 151 */ {IOCFG_BL_BASE+0x010}
};


PIN_offset SMT_offset[] = {
	/* 0 */ {3},
	/* 1 */ {3},
	/* 2 */ {3},
	/* 3 */ {3},
	/* 4 */ {4},
	/* 5 */ {4},
	/* 6 */ {4},
	/* 7 */ {4},
	/* 8 */ {0},
	/* 9 */ {11},
	/* 10 */ {11},
	/* 11 */ {3},
	/* 12 */ {7},
	/* 13 */ {0},
	/* 14 */ {0},
	/* 15 */ {0},
	/* 16 */ {0},
	/* 17 */ {1},
	/* 18 */ {1},
	/* 19 */ {1},
	/* 20 */ {1},
	/* 21 */ {2},
	/* 22 */ {2},
	/* 23 */ {2},
	/* 24 */ {2},
	/* 25 */ {3},
	/* 26 */ {3},
	/* 27 */ {3},
	/* 28 */ {3},
	/* 29 */ {4},
	/* 30 */ {5},
	/* 31 */ {6},
	/* 32 */ {5},
	/* 33 */ {5},
	/* 34 */ {5},
	/* 35 */ {0},
	/* 36 */ {0},
	/* 37 */ {0},
	/* 38 */ {1},
	/* 39 */ {1},
	/* 40 */ {1},
	/* 41 */ {2},
	/* 42 */ {2},
	/* 43 */ {3},
	/* 44 */ {3},
	/* 45 */ {3},
	/* 46 */ {4},
	/* 47 */ {4},
	/* 48 */ {5},
	/* 49 */ {5},
	/* 50 */ {0},
	/* 51 */ {0},
	/* 52 */ {1},
	/* 53 */ {1},
	/* 54 */ {1},
	/* 55 */ {1},
	/* 56 */ {1},
	/* 57 */ {1},
	/* 58 */ {2},
	/* 59 */ {2},
	/* 60 */ {2},
	/* 61 */ {0},
	/* 62 */ {0},
	/* 63 */ {0},
	/* 64 */ {0},
	/* 65 */ {1},
	/* 66 */ {1},
	/* 67 */ {1},
	/* 68 */ {1},
	/* 69 */ {2},
	/* 70 */ {2},
	/* 71 */ {2},
	/* 72 */ {3},
	/* 73 */ {3},
	/* 74 */ {3},
	/* 75 */ {3},
	/* 76 */ {3},
	/* 77 */ {4},
	/* 78 */ {4},
	/* 79 */ {4},
	/* 80 */ {4},
	/* 81 */ {5},
	/* 82 */ {6},
	/* 83 */ {6},
	/* 84 */ {5},
	/* 85 */ {7},
	/* 86 */ {7},
	/* 87 */ {7},
	/* 88 */ {7},
	/* 89 */ {10},
	/* 90 */ {1},
	/* 91 */ {2},
	/* 92 */ {2},
	/* 93 */ {2},
	/* 94 */ {2},
	/* 95 */ {5},
	/* 96 */ {5},
	/* 97 */ {6},
	/* 98 */ {6},
	/* 99 */ {7},
	/* 100 */ {8},
	/* 101 */ {9},
	/* 102 */ {9},
	/* 103 */ {12},
	/* 104 */ {12},
	/* 105 */ {13},
	/* 106 */ {13},
	/* 107 */ {0},
	/* 108 */ {0},
	/* 109 */ {0},
	/* 110 */ {1},
	/* 111 */ {1},
	/* 112 */ {2},
	/* 113 */ {2},
	/* 114 */ {2},
	/* 115 */ {2},
	/* 116 */ {3},
	/* 117 */ {4},
	/* 118 */ {5},
	/* 119 */ {3},
	/* 120 */ {3},
	/* 121 */ {3},
	/* 122 */ {0},
	/* 123 */ {1},
	/* 124 */ {2},
	/* 125 */ {1},
	/* 126 */ {1},
	/* 127 */ {1},
	/* 128 */ {1},
	/* 129 */ {1},
	/* 130 */ {1},
	/* 131 */ {3},
	/* 132 */ {1},
	/* 133 */ {4},
	/* 134 */ {0},
	/* 135 */ {1},
	/* 136 */ {2},
	/* 137 */ {2},
	/* 138 */ {2},
	/* 139 */ {2},
	/* 140 */ {2},
	/* 141 */ {2},
	/* 142 */ {2},
	/* 143 */ {2},
	/* 144 */ {4},
	/* 145 */ {4},
	/* 146 */ {4},
	/* 147 */ {4},
	/* 148 */ {5},
	/* 149 */ {6},
	/* 150 */ {2},
	/* 151 */ {2}
};


PIN_addr PULLEN_addr[] = {
	/* 0 */ {IOCFG_RM_BASE+0x060},
	/* 1 */ {IOCFG_RM_BASE+0x060},
	/* 2 */ {IOCFG_RM_BASE+0x060},
	/* 3 */ {IOCFG_RM_BASE+0x060},
	/* 4 */ {IOCFG_RM_BASE+0x060},
	/* 5 */ {IOCFG_RM_BASE+0x060},
	/* 6 */ {IOCFG_RM_BASE+0x060},
	/* 7 */ {IOCFG_RM_BASE+0x060},
	/* 8 */ {IOCFG_RM_BASE+0x060},
	/* 9 */ {IOCFG_RM_BASE+0x060},
	/* 10 */ {IOCFG_RM_BASE+0x060},
	/* 11 */ {IOCFG_LT_BASE+0x060},
	/* 12 */ {IOCFG_LT_BASE+0x060},
	/* 13 */ {IOCFG_LM_BASE+0x060},
	/* 14 */ {IOCFG_LM_BASE+0x060},
	/* 15 */ {IOCFG_LM_BASE+0x060},
	/* 16 */ {IOCFG_LM_BASE+0x060},
	/* 17 */ {IOCFG_LM_BASE+0x060},
	/* 18 */ {IOCFG_LM_BASE+0x060},
	/* 19 */ {IOCFG_LM_BASE+0x060},
	/* 20 */ {IOCFG_LM_BASE+0x060},
	/* 21 */ {IOCFG_LM_BASE+0x060},
	/* 22 */ {IOCFG_LM_BASE+0x060},
	/* 23 */ {IOCFG_LM_BASE+0x060},
	/* 24 */ {IOCFG_LM_BASE+0x060},
	/* 25 */ {IOCFG_LM_BASE+0x060},
	/* 26 */ {IOCFG_LM_BASE+0x060},
	/* 27 */ {IOCFG_LM_BASE+0x060},
	/* 28 */ {IOCFG_LM_BASE+0x060},
	/* 29 */ {-1},
	/* 30 */ {-1},
	/* 31 */ {-1},
	/* 32 */ {-1},
	/* 33 */ {-1},
	/* 34 */ {-1},
	/* 35 */ {-1},
	/* 36 */ {-1},
	/* 37 */ {-1},
	/* 38 */ {-1},
	/* 39 */ {-1},
	/* 40 */ {-1},
	/* 41 */ {-1},
	/* 42 */ {-1},
	/* 43 */ {IOCFG_LB_BASE+0x060},
	/* 44 */ {IOCFG_LB_BASE+0x060},
	/* 45 */ {IOCFG_LB_BASE+0x060},
	/* 46 */ {IOCFG_LB_BASE+0x060},
	/* 47 */ {IOCFG_LB_BASE+0x060},
	/* 48 */ {IOCFG_LB_BASE+0x060},
	/* 49 */ {IOCFG_LB_BASE+0x060},
	/* 50 */ {IOCFG_BL_BASE+0x060},
	/* 51 */ {IOCFG_BL_BASE+0x060},
	/* 52 */ {IOCFG_BL_BASE+0x060},
	/* 53 */ {IOCFG_BL_BASE+0x060},
	/* 54 */ {IOCFG_BL_BASE+0x060},
	/* 55 */ {IOCFG_BL_BASE+0x060},
	/* 56 */ {IOCFG_BL_BASE+0x060},
	/* 57 */ {IOCFG_BL_BASE+0x060},
	/* 58 */ {IOCFG_BL_BASE+0x060},
	/* 59 */ {IOCFG_BL_BASE+0x060},
	/* 60 */ {IOCFG_BL_BASE+0x060},
	/* 61 */ {IOCFG_RB_BASE+0x060},
	/* 62 */ {IOCFG_RB_BASE+0x060},
	/* 63 */ {IOCFG_RB_BASE+0x060},
	/* 64 */ {IOCFG_RB_BASE+0x060},
	/* 65 */ {IOCFG_RB_BASE+0x060},
	/* 66 */ {IOCFG_RB_BASE+0x060},
	/* 67 */ {IOCFG_RB_BASE+0x060},
	/* 68 */ {IOCFG_RB_BASE+0x060},
	/* 69 */ {IOCFG_RB_BASE+0x060},
	/* 70 */ {IOCFG_RB_BASE+0x060},
	/* 71 */ {IOCFG_RB_BASE+0x060},
	/* 72 */ {IOCFG_RB_BASE+0x060},
	/* 73 */ {IOCFG_RB_BASE+0x060},
	/* 74 */ {IOCFG_RB_BASE+0x060},
	/* 75 */ {IOCFG_RB_BASE+0x060},
	/* 76 */ {IOCFG_RB_BASE+0x060},
	/* 77 */ {IOCFG_RB_BASE+0x060},
	/* 78 */ {IOCFG_RB_BASE+0x060},
	/* 79 */ {IOCFG_RB_BASE+0x060},
	/* 80 */ {IOCFG_RB_BASE+0x060},
	/* 81 */ {IOCFG_RB_BASE+0x060},
	/* 82 */ {IOCFG_RB_BASE+0x060},
	/* 83 */ {IOCFG_RB_BASE+0x060},
	/* 84 */ {IOCFG_RB_BASE+0x060},
	/* 85 */ {IOCFG_RB_BASE+0x060},
	/* 86 */ {IOCFG_RB_BASE+0x060},
	/* 87 */ {IOCFG_RB_BASE+0x060},
	/* 88 */ {IOCFG_RB_BASE+0x060},
	/* 89 */ {IOCFG_RM_BASE+0x060},
	/* 90 */ {IOCFG_RM_BASE+0x060},
	/* 91 */ {-1},
	/* 92 */ {-1},
	/* 93 */ {-1},
	/* 94 */ {-1},
	/* 95 */ {IOCFG_RM_BASE+0x060},
	/* 96 */ {IOCFG_RM_BASE+0x060},
	/* 97 */ {IOCFG_RM_BASE+0x060},
	/* 98 */ {IOCFG_RM_BASE+0x060},
	/* 99 */ {IOCFG_RM_BASE+0x060},
	/* 100 */ {IOCFG_RM_BASE+0x060},
	/* 101 */ {IOCFG_RM_BASE+0x060},
	/* 102 */ {IOCFG_RM_BASE+0x060},
	/* 103 */ {IOCFG_RM_BASE+0x060},
	/* 104 */ {IOCFG_RM_BASE+0x060},
	/* 105 */ {IOCFG_RM_BASE+0x060},
	/* 106 */ {IOCFG_RM_BASE+0x060},
	/* 107 */ {-1},
	/* 108 */ {-1},
	/* 109 */ {-1},
	/* 110 */ {IOCFG_RT_BASE+0x060},
	/* 111 */ {IOCFG_RT_BASE+0x060},
	/* 112 */ {IOCFG_RT_BASE+0x060},
	/* 113 */ {IOCFG_RT_BASE+0x060},
	/* 114 */ {IOCFG_RT_BASE+0x060},
	/* 115 */ {IOCFG_RT_BASE+0x060},
	/* 116 */ {-1},
	/* 117 */ {-1},
	/* 118 */ {-1},
	/* 119 */ {-1},
	/* 120 */ {-1},
	/* 121 */ {-1},
	/* 122 */ {-1},
	/* 123 */ {-1},
	/* 124 */ {-1},
	/* 125 */ {-1},
	/* 126 */ {-1},
	/* 127 */ {-1},
	/* 128 */ {-1},
	/* 129 */ {-1},
	/* 130 */ {-1},
	/* 131 */ {-1},
	/* 132 */ {-1},
	/* 133 */ {-1},
	/* 134 */ {IOCFG_LT_BASE+0x060},
	/* 135 */ {IOCFG_LT_BASE+0x060},
	/* 136 */ {IOCFG_LT_BASE+0x060},
	/* 137 */ {IOCFG_LT_BASE+0x060},
	/* 138 */ {IOCFG_LT_BASE+0x060},
	/* 139 */ {IOCFG_LT_BASE+0x060},
	/* 140 */ {IOCFG_LT_BASE+0x060},
	/* 141 */ {IOCFG_LT_BASE+0x060},
	/* 142 */ {IOCFG_LT_BASE+0x060},
	/* 143 */ {IOCFG_LT_BASE+0x060},
	/* 144 */ {IOCFG_LT_BASE+0x060},
	/* 145 */ {IOCFG_LT_BASE+0x060},
	/* 146 */ {IOCFG_LT_BASE+0x060},
	/* 147 */ {IOCFG_LT_BASE+0x060},
	/* 148 */ {IOCFG_LT_BASE+0x060},
	/* 149 */ {IOCFG_LT_BASE+0x060},
	/* 150 */ {IOCFG_BL_BASE+0x060},
	/* 151 */ {IOCFG_BL_BASE+0x060}
};


PIN_offset PULLEN_offset[] = {
	/* 0 */ {6},
	/* 1 */ {7},
	/* 2 */ {8},
	/* 3 */ {9},
	/* 4 */ {10},
	/* 5 */ {11},
	/* 6 */ {12},
	/* 7 */ {13},
	/* 8 */ {22},
	/* 9 */ {23},
	/* 10 */ {24},
	/* 11 */ {10},
	/* 12 */ {17},
	/* 13 */ {0},
	/* 14 */ {1},
	/* 15 */ {2},
	/* 16 */ {3},
	/* 17 */ {4},
	/* 18 */ {5},
	/* 19 */ {6},
	/* 20 */ {7},
	/* 21 */ {8},
	/* 22 */ {9},
	/* 23 */ {10},
	/* 24 */ {11},
	/* 25 */ {12},
	/* 26 */ {13},
	/* 27 */ {14},
	/* 28 */ {15},
	/* 29 */ {-1},
	/* 30 */ {-1},
	/* 31 */ {-1},
	/* 32 */ {-1},
	/* 33 */ {-1},
	/* 34 */ {-1},
	/* 35 */ {-1},
	/* 36 */ {-1},
	/* 37 */ {-1},
	/* 38 */ {-1},
	/* 39 */ {-1},
	/* 40 */ {-1},
	/* 41 */ {-1},
	/* 42 */ {-1},
	/* 43 */ {8},
	/* 44 */ {9},
	/* 45 */ {10},
	/* 46 */ {11},
	/* 47 */ {12},
	/* 48 */ {13},
	/* 49 */ {14},
	/* 50 */ {0},
	/* 51 */ {1},
	/* 52 */ {2},
	/* 53 */ {3},
	/* 54 */ {4},
	/* 55 */ {5},
	/* 56 */ {6},
	/* 57 */ {7},
	/* 58 */ {8},
	/* 59 */ {9},
	/* 60 */ {10},
	/* 61 */ {0},
	/* 62 */ {1},
	/* 63 */ {2},
	/* 64 */ {3},
	/* 65 */ {4},
	/* 66 */ {5},
	/* 67 */ {6},
	/* 68 */ {7},
	/* 69 */ {8},
	/* 70 */ {9},
	/* 71 */ {10},
	/* 72 */ {11},
	/* 73 */ {12},
	/* 74 */ {13},
	/* 75 */ {14},
	/* 76 */ {15},
	/* 77 */ {16},
	/* 78 */ {17},
	/* 79 */ {18},
	/* 80 */ {19},
	/* 81 */ {20},
	/* 82 */ {21},
	/* 83 */ {22},
	/* 84 */ {23},
	/* 85 */ {24},
	/* 86 */ {25},
	/* 87 */ {26},
	/* 88 */ {27},
	/* 89 */ {0},
	/* 90 */ {1},
	/* 91 */ {-1},
	/* 92 */ {-1},
	/* 93 */ {-1},
	/* 94 */ {-1},
	/* 95 */ {14},
	/* 96 */ {15},
	/* 97 */ {16},
	/* 98 */ {17},
	/* 99 */ {18},
	/* 100 */ {19},
	/* 101 */ {20},
	/* 102 */ {21},
	/* 103 */ {25},
	/* 104 */ {26},
	/* 105 */ {27},
	/* 106 */ {28},
	/* 107 */ {-1},
	/* 108 */ {-1},
	/* 109 */ {-1},
	/* 110 */ {3},
	/* 111 */ {4},
	/* 112 */ {5},
	/* 113 */ {6},
	/* 114 */ {7},
	/* 115 */ {8},
	/* 116 */ {-1},
	/* 117 */ {-1},
	/* 118 */ {-1},
	/* 119 */ {-1},
	/* 120 */ {-1},
	/* 121 */ {-1},
	/* 122 */ {-1},
	/* 123 */ {-1},
	/* 124 */ {-1},
	/* 125 */ {-1},
	/* 126 */ {-1},
	/* 127 */ {-1},
	/* 128 */ {-1},
	/* 129 */ {-1},
	/* 130 */ {-1},
	/* 131 */ {-1},
	/* 132 */ {-1},
	/* 133 */ {-1},
	/* 134 */ {0},
	/* 135 */ {1},
	/* 136 */ {2},
	/* 137 */ {3},
	/* 138 */ {4},
	/* 139 */ {5},
	/* 140 */ {6},
	/* 141 */ {7},
	/* 142 */ {8},
	/* 143 */ {9},
	/* 144 */ {11},
	/* 145 */ {12},
	/* 146 */ {13},
	/* 147 */ {14},
	/* 148 */ {15},
	/* 149 */ {16},
	/* 150 */ {11},
	/* 151 */ {12}
};


PIN_addr PULLSEL_addr[] = {
	/* 0 */ {IOCFG_RM_BASE+0x080},
	/* 1 */ {IOCFG_RM_BASE+0x080},
	/* 2 */ {IOCFG_RM_BASE+0x080},
	/* 3 */ {IOCFG_RM_BASE+0x080},
	/* 4 */ {IOCFG_RM_BASE+0x080},
	/* 5 */ {IOCFG_RM_BASE+0x080},
	/* 6 */ {IOCFG_RM_BASE+0x080},
	/* 7 */ {IOCFG_RM_BASE+0x080},
	/* 8 */ {IOCFG_RM_BASE+0x080},
	/* 9 */ {IOCFG_RM_BASE+0x080},
	/* 10 */ {IOCFG_RM_BASE+0x080},
	/* 11 */ {IOCFG_LT_BASE+0x080},
	/* 12 */ {IOCFG_LT_BASE+0x080},
	/* 13 */ {IOCFG_LM_BASE+0x080},
	/* 14 */ {IOCFG_LM_BASE+0x080},
	/* 15 */ {IOCFG_LM_BASE+0x080},
	/* 16 */ {IOCFG_LM_BASE+0x080},
	/* 17 */ {IOCFG_LM_BASE+0x080},
	/* 18 */ {IOCFG_LM_BASE+0x080},
	/* 19 */ {IOCFG_LM_BASE+0x080},
	/* 20 */ {IOCFG_LM_BASE+0x080},
	/* 21 */ {IOCFG_LM_BASE+0x080},
	/* 22 */ {IOCFG_LM_BASE+0x080},
	/* 23 */ {IOCFG_LM_BASE+0x080},
	/* 24 */ {IOCFG_LM_BASE+0x080},
	/* 25 */ {IOCFG_LM_BASE+0x080},
	/* 26 */ {IOCFG_LM_BASE+0x080},
	/* 27 */ {IOCFG_LM_BASE+0x080},
	/* 28 */ {IOCFG_LM_BASE+0x080},
	/* 29 */ {-1},
	/* 30 */ {-1},
	/* 31 */ {-1},
	/* 32 */ {-1},
	/* 33 */ {-1},
	/* 34 */ {-1},
	/* 35 */ {-1},
	/* 36 */ {-1},
	/* 37 */ {-1},
	/* 38 */ {-1},
	/* 39 */ {-1},
	/* 40 */ {-1},
	/* 41 */ {-1},
	/* 42 */ {-1},
	/* 43 */ {IOCFG_LB_BASE+0x080},
	/* 44 */ {IOCFG_LB_BASE+0x080},
	/* 45 */ {IOCFG_LB_BASE+0x080},
	/* 46 */ {IOCFG_LB_BASE+0x080},
	/* 47 */ {IOCFG_LB_BASE+0x080},
	/* 48 */ {IOCFG_LB_BASE+0x080},
	/* 49 */ {IOCFG_LB_BASE+0x080},
	/* 50 */ {IOCFG_BL_BASE+0x080},
	/* 51 */ {IOCFG_BL_BASE+0x080},
	/* 52 */ {IOCFG_BL_BASE+0x080},
	/* 53 */ {IOCFG_BL_BASE+0x080},
	/* 54 */ {IOCFG_BL_BASE+0x080},
	/* 55 */ {IOCFG_BL_BASE+0x080},
	/* 56 */ {IOCFG_BL_BASE+0x080},
	/* 57 */ {IOCFG_BL_BASE+0x080},
	/* 58 */ {IOCFG_BL_BASE+0x080},
	/* 59 */ {IOCFG_BL_BASE+0x080},
	/* 60 */ {IOCFG_BL_BASE+0x080},
	/* 61 */ {IOCFG_RB_BASE+0x080},
	/* 62 */ {IOCFG_RB_BASE+0x080},
	/* 63 */ {IOCFG_RB_BASE+0x080},
	/* 64 */ {IOCFG_RB_BASE+0x080},
	/* 65 */ {IOCFG_RB_BASE+0x080},
	/* 66 */ {IOCFG_RB_BASE+0x080},
	/* 67 */ {IOCFG_RB_BASE+0x080},
	/* 68 */ {IOCFG_RB_BASE+0x080},
	/* 69 */ {IOCFG_RB_BASE+0x080},
	/* 70 */ {IOCFG_RB_BASE+0x080},
	/* 71 */ {IOCFG_RB_BASE+0x080},
	/* 72 */ {IOCFG_RB_BASE+0x080},
	/* 73 */ {IOCFG_RB_BASE+0x080},
	/* 74 */ {IOCFG_RB_BASE+0x080},
	/* 75 */ {IOCFG_RB_BASE+0x080},
	/* 76 */ {IOCFG_RB_BASE+0x080},
	/* 77 */ {IOCFG_RB_BASE+0x080},
	/* 78 */ {IOCFG_RB_BASE+0x080},
	/* 79 */ {IOCFG_RB_BASE+0x080},
	/* 80 */ {IOCFG_RB_BASE+0x080},
	/* 81 */ {IOCFG_RB_BASE+0x080},
	/* 82 */ {IOCFG_RB_BASE+0x080},
	/* 83 */ {IOCFG_RB_BASE+0x080},
	/* 84 */ {IOCFG_RB_BASE+0x080},
	/* 85 */ {IOCFG_RB_BASE+0x080},
	/* 86 */ {IOCFG_RB_BASE+0x080},
	/* 87 */ {IOCFG_RB_BASE+0x080},
	/* 88 */ {IOCFG_RB_BASE+0x080},
	/* 89 */ {IOCFG_RM_BASE+0x080},
	/* 90 */ {IOCFG_RM_BASE+0x080},
	/* 91 */ {-1},
	/* 92 */ {-1},
	/* 93 */ {-1},
	/* 94 */ {-1},
	/* 95 */ {IOCFG_RM_BASE+0x080},
	/* 96 */ {IOCFG_RM_BASE+0x080},
	/* 97 */ {IOCFG_RM_BASE+0x080},
	/* 98 */ {IOCFG_RM_BASE+0x080},
	/* 99 */ {IOCFG_RM_BASE+0x080},
	/* 100 */ {IOCFG_RM_BASE+0x080},
	/* 101 */ {IOCFG_RM_BASE+0x080},
	/* 102 */ {IOCFG_RM_BASE+0x080},
	/* 103 */ {IOCFG_RM_BASE+0x080},
	/* 104 */ {IOCFG_RM_BASE+0x080},
	/* 105 */ {IOCFG_RM_BASE+0x080},
	/* 106 */ {IOCFG_RM_BASE+0x080},
	/* 107 */ {-1},
	/* 108 */ {-1},
	/* 109 */ {-1},
	/* 110 */ {IOCFG_RT_BASE+0x080},
	/* 111 */ {IOCFG_RT_BASE+0x080},
	/* 112 */ {IOCFG_RT_BASE+0x080},
	/* 113 */ {IOCFG_RT_BASE+0x080},
	/* 114 */ {IOCFG_RT_BASE+0x080},
	/* 115 */ {IOCFG_RT_BASE+0x080},
	/* 116 */ {-1},
	/* 117 */ {-1},
	/* 118 */ {-1},
	/* 119 */ {-1},
	/* 120 */ {-1},
	/* 121 */ {-1},
	/* 122 */ {-1},
	/* 123 */ {-1},
	/* 124 */ {-1},
	/* 125 */ {-1},
	/* 126 */ {-1},
	/* 127 */ {-1},
	/* 128 */ {-1},
	/* 129 */ {-1},
	/* 130 */ {-1},
	/* 131 */ {-1},
	/* 132 */ {-1},
	/* 133 */ {-1},
	/* 134 */ {IOCFG_LT_BASE+0x080},
	/* 135 */ {IOCFG_LT_BASE+0x080},
	/* 136 */ {IOCFG_LT_BASE+0x080},
	/* 137 */ {IOCFG_LT_BASE+0x080},
	/* 138 */ {IOCFG_LT_BASE+0x080},
	/* 139 */ {IOCFG_LT_BASE+0x080},
	/* 140 */ {IOCFG_LT_BASE+0x080},
	/* 141 */ {IOCFG_LT_BASE+0x080},
	/* 142 */ {IOCFG_LT_BASE+0x080},
	/* 143 */ {IOCFG_LT_BASE+0x080},
	/* 144 */ {IOCFG_LT_BASE+0x080},
	/* 145 */ {IOCFG_LT_BASE+0x080},
	/* 146 */ {IOCFG_LT_BASE+0x080},
	/* 147 */ {IOCFG_LT_BASE+0x080},
	/* 148 */ {IOCFG_LT_BASE+0x080},
	/* 149 */ {IOCFG_LT_BASE+0x080},
	/* 150 */ {IOCFG_BL_BASE+0x080},
	/* 151 */ {IOCFG_BL_BASE+0x080}
};


PIN_offset PULLSEL_offset[] = {
	/* 0 */ {6},
	/* 1 */ {7},
	/* 2 */ {8},
	/* 3 */ {9},
	/* 4 */ {10},
	/* 5 */ {11},
	/* 6 */ {12},
	/* 7 */ {13},
	/* 8 */ {22},
	/* 9 */ {23},
	/* 10 */ {24},
	/* 11 */ {10},
	/* 12 */ {17},
	/* 13 */ {0},
	/* 14 */ {1},
	/* 15 */ {2},
	/* 16 */ {3},
	/* 17 */ {4},
	/* 18 */ {5},
	/* 19 */ {6},
	/* 20 */ {7},
	/* 21 */ {8},
	/* 22 */ {9},
	/* 23 */ {10},
	/* 24 */ {11},
	/* 25 */ {12},
	/* 26 */ {13},
	/* 27 */ {14},
	/* 28 */ {15},
	/* 29 */ {-1},
	/* 30 */ {-1},
	/* 31 */ {-1},
	/* 32 */ {-1},
	/* 33 */ {-1},
	/* 34 */ {-1},
	/* 35 */ {-1},
	/* 36 */ {-1},
	/* 37 */ {-1},
	/* 38 */ {-1},
	/* 39 */ {-1},
	/* 40 */ {-1},
	/* 41 */ {-1},
	/* 42 */ {-1},
	/* 43 */ {8},
	/* 44 */ {9},
	/* 45 */ {10},
	/* 46 */ {11},
	/* 47 */ {12},
	/* 48 */ {13},
	/* 49 */ {14},
	/* 50 */ {0},
	/* 51 */ {1},
	/* 52 */ {2},
	/* 53 */ {3},
	/* 54 */ {4},
	/* 55 */ {5},
	/* 56 */ {6},
	/* 57 */ {7},
	/* 58 */ {8},
	/* 59 */ {9},
	/* 60 */ {10},
	/* 61 */ {0},
	/* 62 */ {1},
	/* 63 */ {2},
	/* 64 */ {3},
	/* 65 */ {4},
	/* 66 */ {5},
	/* 67 */ {6},
	/* 68 */ {7},
	/* 69 */ {8},
	/* 70 */ {9},
	/* 71 */ {10},
	/* 72 */ {11},
	/* 73 */ {12},
	/* 74 */ {13},
	/* 75 */ {14},
	/* 76 */ {15},
	/* 77 */ {16},
	/* 78 */ {17},
	/* 79 */ {18},
	/* 80 */ {19},
	/* 81 */ {20},
	/* 82 */ {21},
	/* 83 */ {22},
	/* 84 */ {23},
	/* 85 */ {24},
	/* 86 */ {25},
	/* 87 */ {26},
	/* 88 */ {27},
	/* 89 */ {0},
	/* 90 */ {1},
	/* 91 */ {-1},
	/* 92 */ {-1},
	/* 93 */ {-1},
	/* 94 */ {-1},
	/* 95 */ {14},
	/* 96 */ {15},
	/* 97 */ {16},
	/* 98 */ {17},
	/* 99 */ {18},
	/* 100 */ {19},
	/* 101 */ {20},
	/* 102 */ {21},
	/* 103 */ {25},
	/* 104 */ {26},
	/* 105 */ {27},
	/* 106 */ {28},
	/* 107 */ {-1},
	/* 108 */ {-1},
	/* 109 */ {-1},
	/* 110 */ {3},
	/* 111 */ {4},
	/* 112 */ {5},
	/* 113 */ {6},
	/* 114 */ {7},
	/* 115 */ {8},
	/* 116 */ {-1},
	/* 117 */ {-1},
	/* 118 */ {-1},
	/* 119 */ {-1},
	/* 120 */ {-1},
	/* 121 */ {-1},
	/* 122 */ {-1},
	/* 123 */ {-1},
	/* 124 */ {-1},
	/* 125 */ {-1},
	/* 126 */ {-1},
	/* 127 */ {-1},
	/* 128 */ {-1},
	/* 129 */ {-1},
	/* 130 */ {-1},
	/* 131 */ {-1},
	/* 132 */ {-1},
	/* 133 */ {-1},
	/* 134 */ {0},
	/* 135 */ {1},
	/* 136 */ {2},
	/* 137 */ {3},
	/* 138 */ {4},
	/* 139 */ {5},
	/* 140 */ {6},
	/* 141 */ {7},
	/* 142 */ {8},
	/* 143 */ {9},
	/* 144 */ {11},
	/* 145 */ {12},
	/* 146 */ {13},
	/* 147 */ {14},
	/* 148 */ {15},
	/* 149 */ {16},
	/* 150 */ {11},
	/* 151 */ {12}
};


PIN_addr PUPD_addr[] = {
	/* 0 */ {-1},
	/* 1 */ {-1},
	/* 2 */ {-1},
	/* 3 */ {-1},
	/* 4 */ {-1},
	/* 5 */ {-1},
	/* 6 */ {-1},
	/* 7 */ {-1},
	/* 8 */ {-1},
	/* 9 */ {-1},
	/* 10 */ {-1},
	/* 11 */ {-1},
	/* 12 */ {-1},
	/* 13 */ {-1},
	/* 14 */ {-1},
	/* 15 */ {-1},
	/* 16 */ {-1},
	/* 17 */ {-1},
	/* 18 */ {-1},
	/* 19 */ {-1},
	/* 20 */ {-1},
	/* 21 */ {-1},
	/* 22 */ {-1},
	/* 23 */ {-1},
	/* 24 */ {-1},
	/* 25 */ {-1},
	/* 26 */ {-1},
	/* 27 */ {-1},
	/* 28 */ {-1},
	/* 29 */ {IOCFG_LM_BASE+0x0C0},
	/* 30 */ {IOCFG_LM_BASE+0x0C0},
	/* 31 */ {IOCFG_LM_BASE+0x0C0},
	/* 32 */ {IOCFG_LM_BASE+0x0C0},
	/* 33 */ {IOCFG_LM_BASE+0x0C0},
	/* 34 */ {IOCFG_LM_BASE+0x0C0},
	/* 35 */ {IOCFG_LB_BASE+0x0C0},
	/* 36 */ {IOCFG_LB_BASE+0x0C0},
	/* 37 */ {IOCFG_LB_BASE+0x0C0},
	/* 38 */ {IOCFG_LB_BASE+0x0C0},
	/* 39 */ {IOCFG_LB_BASE+0x0C0},
	/* 40 */ {IOCFG_LB_BASE+0x0C0},
	/* 41 */ {IOCFG_LB_BASE+0x0C0},
	/* 42 */ {IOCFG_LB_BASE+0x0C0},
	/* 43 */ {-1},
	/* 44 */ {-1},
	/* 45 */ {-1},
	/* 46 */ {-1},
	/* 47 */ {-1},
	/* 48 */ {-1},
	/* 49 */ {-1},
	/* 50 */ {-1},
	/* 51 */ {-1},
	/* 52 */ {-1},
	/* 53 */ {-1},
	/* 54 */ {-1},
	/* 55 */ {-1},
	/* 56 */ {-1},
	/* 57 */ {-1},
	/* 58 */ {-1},
	/* 59 */ {-1},
	/* 60 */ {-1},
	/* 61 */ {-1},
	/* 62 */ {-1},
	/* 63 */ {-1},
	/* 64 */ {-1},
	/* 65 */ {-1},
	/* 66 */ {-1},
	/* 67 */ {-1},
	/* 68 */ {-1},
	/* 69 */ {-1},
	/* 70 */ {-1},
	/* 71 */ {-1},
	/* 72 */ {-1},
	/* 73 */ {-1},
	/* 74 */ {-1},
	/* 75 */ {-1},
	/* 76 */ {-1},
	/* 77 */ {-1},
	/* 78 */ {-1},
	/* 79 */ {-1},
	/* 80 */ {-1},
	/* 81 */ {-1},
	/* 82 */ {-1},
	/* 83 */ {-1},
	/* 84 */ {-1},
	/* 85 */ {-1},
	/* 86 */ {-1},
	/* 87 */ {-1},
	/* 88 */ {-1},
	/* 89 */ {-1},
	/* 90 */ {-1},
	/* 91 */ {IOCFG_RM_BASE+0x0C0},
	/* 92 */ {IOCFG_RM_BASE+0x0C0},
	/* 93 */ {IOCFG_RM_BASE+0x0C0},
	/* 94 */ {IOCFG_RM_BASE+0x0C0},
	/* 95 */ {-1},
	/* 96 */ {-1},
	/* 97 */ {-1},
	/* 98 */ {-1},
	/* 99 */ {-1},
	/* 100 */ {-1},
	/* 101 */ {-1},
	/* 102 */ {-1},
	/* 103 */ {-1},
	/* 104 */ {-1},
	/* 105 */ {-1},
	/* 106 */ {-1},
	/* 107 */ {IOCFG_RT_BASE+0x0C0},
	/* 108 */ {IOCFG_RT_BASE+0x0C0},
	/* 109 */ {IOCFG_RT_BASE+0x0C0},
	/* 110 */ {-1},
	/* 111 */ {-1},
	/* 112 */ {-1},
	/* 113 */ {-1},
	/* 114 */ {-1},
	/* 115 */ {-1},
	/* 116 */ {IOCFG_RT_BASE+0x0C0},
	/* 117 */ {IOCFG_RT_BASE+0x0C0},
	/* 118 */ {IOCFG_RT_BASE+0x0C0},
	/* 119 */ {IOCFG_RT_BASE+0x0C0},
	/* 120 */ {IOCFG_RT_BASE+0x0C0},
	/* 121 */ {IOCFG_RT_BASE+0x0D0},
	/* 122 */ {IOCFG_TL_BASE+0x0C0},
	/* 123 */ {IOCFG_TL_BASE+0x0C0},
	/* 124 */ {IOCFG_TL_BASE+0x0C0},
	/* 125 */ {IOCFG_TL_BASE+0x0C0},
	/* 126 */ {IOCFG_TL_BASE+0x0C0},
	/* 127 */ {IOCFG_TL_BASE+0x0C0},
	/* 128 */ {IOCFG_TL_BASE+0x0C0},
	/* 129 */ {IOCFG_TL_BASE+0x0C0},
	/* 130 */ {IOCFG_TL_BASE+0x0D0},
	/* 131 */ {IOCFG_TL_BASE+0x0D0},
	/* 132 */ {IOCFG_TL_BASE+0x0D0},
	/* 133 */ {IOCFG_TL_BASE+0x0D0},
	/* 134 */ {-1},
	/* 135 */ {-1},
	/* 136 */ {-1},
	/* 137 */ {-1},
	/* 138 */ {-1},
	/* 139 */ {-1},
	/* 140 */ {-1},
	/* 141 */ {-1},
	/* 142 */ {-1},
	/* 143 */ {-1},
	/* 144 */ {-1},
	/* 145 */ {-1},
	/* 146 */ {-1},
	/* 147 */ {-1},
	/* 148 */ {-1},
	/* 149 */ {-1},
	/* 150 */ {-1},
	/* 151 */ {-1}
};

PIN_offset PUPD_offset[] = {
	/* 0 */ {-1},
	/* 1 */ {-1},
	/* 2 */ {-1},
	/* 3 */ {-1},
	/* 4 */ {-1},
	/* 5 */ {-1},
	/* 6 */ {-1},
	/* 7 */ {-1},
	/* 8 */ {-1},
	/* 9 */ {-1},
	/* 10 */ {-1},
	/* 11 */ {-1},
	/* 12 */ {-1},
	/* 13 */ {-1},
	/* 14 */ {-1},
	/* 15 */ {-1},
	/* 16 */ {-1},
	/* 17 */ {-1},
	/* 18 */ {-1},
	/* 19 */ {-1},
	/* 20 */ {-1},
	/* 21 */ {-1},
	/* 22 */ {-1},
	/* 23 */ {-1},
	/* 24 */ {-1},
	/* 25 */ {-1},
	/* 26 */ {-1},
	/* 27 */ {-1},
	/* 28 */ {-1},
	/* 29 */ {0},
	/* 30 */ {4},
	/* 31 */ {8},
	/* 32 */ {12},
	/* 33 */ {16},
	/* 34 */ {20},
	/* 35 */ {0},
	/* 36 */ {4},
	/* 37 */ {8},
	/* 38 */ {12},
	/* 39 */ {16},
	/* 40 */ {20},
	/* 41 */ {24},
	/* 42 */ {28},
	/* 43 */ {-1},
	/* 44 */ {-1},
	/* 45 */ {-1},
	/* 46 */ {-1},
	/* 47 */ {-1},
	/* 48 */ {-1},
	/* 49 */ {-1},
	/* 50 */ {-1},
	/* 51 */ {-1},
	/* 52 */ {-1},
	/* 53 */ {-1},
	/* 54 */ {-1},
	/* 55 */ {-1},
	/* 56 */ {-1},
	/* 57 */ {-1},
	/* 58 */ {-1},
	/* 59 */ {-1},
	/* 60 */ {-1},
	/* 61 */ {-1},
	/* 62 */ {-1},
	/* 63 */ {-1},
	/* 64 */ {-1},
	/* 65 */ {-1},
	/* 66 */ {-1},
	/* 67 */ {-1},
	/* 68 */ {-1},
	/* 69 */ {-1},
	/* 70 */ {-1},
	/* 71 */ {-1},
	/* 72 */ {-1},
	/* 73 */ {-1},
	/* 74 */ {-1},
	/* 75 */ {-1},
	/* 76 */ {-1},
	/* 77 */ {-1},
	/* 78 */ {-1},
	/* 79 */ {-1},
	/* 80 */ {-1},
	/* 81 */ {-1},
	/* 82 */ {-1},
	/* 83 */ {-1},
	/* 84 */ {-1},
	/* 85 */ {-1},
	/* 86 */ {-1},
	/* 87 */ {-1},
	/* 88 */ {-1},
	/* 89 */ {-1},
	/* 90 */ {-1},
	/* 91 */ {4},
	/* 92 */ {0},
	/* 93 */ {8},
	/* 94 */ {12},
	/* 95 */ {-1},
	/* 96 */ {-1},
	/* 97 */ {-1},
	/* 98 */ {-1},
	/* 99 */ {-1},
	/* 100 */ {-1},
	/* 101 */ {-1},
	/* 102 */ {-1},
	/* 103 */ {-1},
	/* 104 */ {-1},
	/* 105 */ {-1},
	/* 106 */ {-1},
	/* 107 */ {0},
	/* 108 */ {4},
	/* 109 */ {8},
	/* 110 */ {-1},
	/* 111 */ {-1},
	/* 112 */ {-1},
	/* 113 */ {-1},
	/* 114 */ {-1},
	/* 115 */ {-1},
	/* 116 */ {12},
	/* 117 */ {16},
	/* 118 */ {20},
	/* 119 */ {24},
	/* 120 */ {28},
	/* 121 */ {0},
	/* 122 */ {0},
	/* 123 */ {4},
	/* 124 */ {8},
	/* 125 */ {12},
	/* 126 */ {16},
	/* 127 */ {20},
	/* 128 */ {24},
	/* 129 */ {28},
	/* 130 */ {0},
	/* 131 */ {4},
	/* 132 */ {8},
	/* 133 */ {12},
	/* 134 */ {-1},
	/* 135 */ {-1},
	/* 136 */ {-1},
	/* 137 */ {-1},
	/* 138 */ {-1},
	/* 139 */ {-1},
	/* 140 */ {-1},
	/* 141 */ {-1},
	/* 142 */ {-1},
	/* 143 */ {-1},
	/* 144 */ {-1},
	/* 145 */ {-1},
	/* 146 */ {-1},
	/* 147 */ {-1},
	/* 148 */ {-1},
	/* 149 */ {-1},
	/* 150 */ {-1},
	/* 151 */ {-1}
};


PIN_addr MODE_addr[] = {
	/* 0 */ {GPIO_BASE+ 0x300},
	/* 1 */ {GPIO_BASE+ 0x300},
	/* 2 */ {GPIO_BASE+ 0x300},
	/* 3 */ {GPIO_BASE+ 0x300},
	/* 4 */ {GPIO_BASE+ 0x300},
	/* 5 */ {GPIO_BASE+ 0x300},
	/* 6 */ {GPIO_BASE+ 0x300},
	/* 7 */ {GPIO_BASE+ 0x300},
	/* 8 */ {GPIO_BASE+ 0x310},
	/* 9 */ {GPIO_BASE+ 0x310},
	/* 10 */ {GPIO_BASE+ 0x310},
	/* 11 */ {GPIO_BASE+ 0x310},
	/* 12 */ {GPIO_BASE+ 0x310},
	/* 13 */ {GPIO_BASE+ 0x310},
	/* 14 */ {GPIO_BASE+ 0x310},
	/* 15 */ {GPIO_BASE+ 0x310},
	/* 16 */ {GPIO_BASE+ 0x320},
	/* 17 */ {GPIO_BASE+ 0x320},
	/* 18 */ {GPIO_BASE+ 0x320},
	/* 19 */ {GPIO_BASE+ 0x320},
	/* 20 */ {GPIO_BASE+ 0x320},
	/* 21 */ {GPIO_BASE+ 0x320},
	/* 22 */ {GPIO_BASE+ 0x320},
	/* 23 */ {GPIO_BASE+ 0x320},
	/* 24 */ {GPIO_BASE+ 0x330},
	/* 25 */ {GPIO_BASE+ 0x330},
	/* 26 */ {GPIO_BASE+ 0x330},
	/* 27 */ {GPIO_BASE+ 0x330},
	/* 28 */ {GPIO_BASE+ 0x330},
	/* 29 */ {GPIO_BASE+ 0x330},
	/* 30 */ {GPIO_BASE+ 0x330},
	/* 31 */ {GPIO_BASE+ 0x330},
	/* 32 */ {GPIO_BASE+ 0x340},
	/* 33 */ {GPIO_BASE+ 0x340},
	/* 34 */ {GPIO_BASE+ 0x340},
	/* 35 */ {GPIO_BASE+ 0x340},
	/* 36 */ {GPIO_BASE+ 0x340},
	/* 37 */ {GPIO_BASE+ 0x340},
	/* 38 */ {GPIO_BASE+ 0x340},
	/* 39 */ {GPIO_BASE+ 0x340},
	/* 40 */ {GPIO_BASE+ 0x350},
	/* 41 */ {GPIO_BASE+ 0x350},
	/* 42 */ {GPIO_BASE+ 0x350},
	/* 43 */ {GPIO_BASE+ 0x350},
	/* 44 */ {GPIO_BASE+ 0x350},
	/* 45 */ {GPIO_BASE+ 0x350},
	/* 46 */ {GPIO_BASE+ 0x350},
	/* 47 */ {GPIO_BASE+ 0x350},
	/* 48 */ {GPIO_BASE+ 0x360},
	/* 49 */ {GPIO_BASE+ 0x360},
	/* 50 */ {GPIO_BASE+ 0x360},
	/* 51 */ {GPIO_BASE+ 0x360},
	/* 52 */ {GPIO_BASE+ 0x360},
	/* 53 */ {GPIO_BASE+ 0x360},
	/* 54 */ {GPIO_BASE+ 0x360},
	/* 55 */ {GPIO_BASE+ 0x360},
	/* 56 */ {GPIO_BASE+ 0x370},
	/* 57 */ {GPIO_BASE+ 0x370},
	/* 58 */ {GPIO_BASE+ 0x370},
	/* 59 */ {GPIO_BASE+ 0x370},
	/* 60 */ {GPIO_BASE+ 0x370},
	/* 61 */ {GPIO_BASE+ 0x370},
	/* 62 */ {GPIO_BASE+ 0x370},
	/* 63 */ {GPIO_BASE+ 0x370},
	/* 64 */ {GPIO_BASE+ 0x380},
	/* 65 */ {GPIO_BASE+ 0x380},
	/* 66 */ {GPIO_BASE+ 0x380},
	/* 67 */ {GPIO_BASE+ 0x380},
	/* 68 */ {GPIO_BASE+ 0x380},
	/* 69 */ {GPIO_BASE+ 0x380},
	/* 70 */ {GPIO_BASE+ 0x380},
	/* 71 */ {GPIO_BASE+ 0x380},
	/* 72 */ {GPIO_BASE+ 0x390},
	/* 73 */ {GPIO_BASE+ 0x390},
	/* 74 */ {GPIO_BASE+ 0x390},
	/* 75 */ {GPIO_BASE+ 0x390},
	/* 76 */ {GPIO_BASE+ 0x390},
	/* 77 */ {GPIO_BASE+ 0x390},
	/* 78 */ {GPIO_BASE+ 0x390},
	/* 79 */ {GPIO_BASE+ 0x390},
	/* 80 */ {GPIO_BASE+ 0x3A0},
	/* 81 */ {GPIO_BASE+ 0x3A0},
	/* 82 */ {GPIO_BASE+ 0x3A0},
	/* 83 */ {GPIO_BASE+ 0x3A0},
	/* 84 */ {GPIO_BASE+ 0x3A0},
	/* 85 */ {GPIO_BASE+ 0x3A0},
	/* 86 */ {GPIO_BASE+ 0x3A0},
	/* 87 */ {GPIO_BASE+ 0x3A0},
	/* 88 */ {GPIO_BASE+ 0x3B0},
	/* 89 */ {GPIO_BASE+ 0x3B0},
	/* 90 */ {GPIO_BASE+ 0x3B0},
	/* 91 */ {GPIO_BASE+ 0x3B0},
	/* 92 */ {GPIO_BASE+ 0x3B0},
	/* 93 */ {GPIO_BASE+ 0x3B0},
	/* 94 */ {GPIO_BASE+ 0x3B0},
	/* 95 */ {GPIO_BASE+ 0x3B0},
	/* 96 */ {GPIO_BASE+ 0x3C0},
	/* 97 */ {GPIO_BASE+ 0x3C0},
	/* 98 */ {GPIO_BASE+ 0x3C0},
	/* 99 */ {GPIO_BASE+ 0x3C0},
	/* 100 */ {GPIO_BASE+ 0x3C0},
	/* 101 */ {GPIO_BASE+ 0x3C0},
	/* 102 */ {GPIO_BASE+ 0x3C0},
	/* 103 */ {GPIO_BASE+ 0x3C0},
	/* 104 */ {GPIO_BASE+ 0x3D0},
	/* 105 */ {GPIO_BASE+ 0x3D0},
	/* 106 */ {GPIO_BASE+ 0x3D0},
	/* 107 */ {GPIO_BASE+ 0x3D0},
	/* 108 */ {GPIO_BASE+ 0x3D0},
	/* 109 */ {GPIO_BASE+ 0x3D0},
	/* 110 */ {GPIO_BASE+ 0x3D0},
	/* 111 */ {GPIO_BASE+ 0x3D0},
	/* 112 */ {GPIO_BASE+ 0x3E0},
	/* 113 */ {GPIO_BASE+ 0x3E0},
	/* 114 */ {GPIO_BASE+ 0x3E0},
	/* 115 */ {GPIO_BASE+ 0x3E0},
	/* 116 */ {GPIO_BASE+ 0x3E0},
	/* 117 */ {GPIO_BASE+ 0x3E0},
	/* 118 */ {GPIO_BASE+ 0x3E0},
	/* 119 */ {GPIO_BASE+ 0x3E0},
	/* 120 */ {GPIO_BASE+ 0x3F0},
	/* 121 */ {GPIO_BASE+ 0x3F0},
	/* 122 */ {GPIO_BASE+ 0x3F0},
	/* 123 */ {GPIO_BASE+ 0x3F0},
	/* 124 */ {GPIO_BASE+ 0x3F0},
	/* 125 */ {GPIO_BASE+ 0x3F0},
	/* 126 */ {GPIO_BASE+ 0x3F0},
	/* 127 */ {GPIO_BASE+ 0x3F0},
	/* 128 */ {GPIO_BASE+ 0x400},
	/* 129 */ {GPIO_BASE+ 0x400},
	/* 130 */ {GPIO_BASE+ 0x400},
	/* 131 */ {GPIO_BASE+ 0x400},
	/* 132 */ {GPIO_BASE+ 0x400},
	/* 133 */ {GPIO_BASE+ 0x400},
	/* 134 */ {GPIO_BASE+ 0x400},
	/* 135 */ {GPIO_BASE+ 0x400},
	/* 136 */ {GPIO_BASE+ 0x410},
	/* 137 */ {GPIO_BASE+ 0x410},
	/* 138 */ {GPIO_BASE+ 0x410},
	/* 139 */ {GPIO_BASE+ 0x410},
	/* 140 */ {GPIO_BASE+ 0x410},
	/* 141 */ {GPIO_BASE+ 0x410},
	/* 142 */ {GPIO_BASE+ 0x410},
	/* 143 */ {GPIO_BASE+ 0x410},
	/* 144 */ {GPIO_BASE+ 0x420},
	/* 145 */ {GPIO_BASE+ 0x420},
	/* 146 */ {GPIO_BASE+ 0x420},
	/* 147 */ {GPIO_BASE+ 0x420},
	/* 148 */ {GPIO_BASE+ 0x420},
	/* 149 */ {GPIO_BASE+ 0x420},
	/* 150 */ {GPIO_BASE+ 0x420},
	/* 151 */ {GPIO_BASE+ 0x420}
};



PIN_offset MODE_offset[] = {
	/* 0 */ {0},
	/* 1 */ {4},
	/* 2 */ {8},
	/* 3 */ {12},
	/* 4 */ {16},
	/* 5 */ {20},
	/* 6 */ {24},
	/* 7 */ {28},
	/* 8 */ {0},
	/* 9 */ {4},
	/* 10 */ {8},
	/* 11 */ {12},
	/* 12 */ {16},
	/* 13 */ {20},
	/* 14 */ {24},
	/* 15 */ {28},
	/* 16 */ {0},
	/* 17 */ {4},
	/* 18 */ {8},
	/* 19 */ {12},
	/* 20 */ {16},
	/* 21 */ {20},
	/* 22 */ {24},
	/* 23 */ {28},
	/* 24 */ {0},
	/* 25 */ {4},
	/* 26 */ {8},
	/* 27 */ {12},
	/* 28 */ {16},
	/* 29 */ {20},
	/* 30 */ {24},
	/* 31 */ {28},
	/* 32 */ {0},
	/* 33 */ {4},
	/* 34 */ {8},
	/* 35 */ {12},
	/* 36 */ {16},
	/* 37 */ {20},
	/* 38 */ {24},
	/* 39 */ {28},
	/* 40 */ {0},
	/* 41 */ {4},
	/* 42 */ {8},
	/* 43 */ {12},
	/* 44 */ {16},
	/* 45 */ {20},
	/* 46 */ {24},
	/* 47 */ {28},
	/* 48 */ {0},
	/* 49 */ {4},
	/* 50 */ {8},
	/* 51 */ {12},
	/* 52 */ {16},
	/* 53 */ {20},
	/* 54 */ {24},
	/* 55 */ {28},
	/* 56 */ {0},
	/* 57 */ {4},
	/* 58 */ {8},
	/* 59 */ {12},
	/* 60 */ {16},
	/* 61 */ {20},
	/* 62 */ {24},
	/* 63 */ {28},
	/* 64 */ {0},
	/* 65 */ {4},
	/* 66 */ {8},
	/* 67 */ {12},
	/* 68 */ {16},
	/* 69 */ {20},
	/* 70 */ {24},
	/* 71 */ {28},
	/* 72 */ {0},
	/* 73 */ {4},
	/* 74 */ {8},
	/* 75 */ {12},
	/* 76 */ {16},
	/* 77 */ {20},
	/* 78 */ {24},
	/* 79 */ {28},
	/* 80 */ {0},
	/* 81 */ {4},
	/* 82 */ {8},
	/* 83 */ {12},
	/* 84 */ {16},
	/* 85 */ {20},
	/* 86 */ {24},
	/* 87 */ {28},
	/* 88 */ {0},
	/* 89 */ {4},
	/* 90 */ {8},
	/* 91 */ {12},
	/* 92 */ {16},
	/* 93 */ {20},
	/* 94 */ {24},
	/* 95 */ {28},
	/* 96 */ {0},
	/* 97 */ {4},
	/* 98 */ {8},
	/* 99 */ {12},
	/* 100 */ {16},
	/* 101 */ {20},
	/* 102 */ {24},
	/* 103 */ {28},
	/* 104 */ {0},
	/* 105 */ {4},
	/* 106 */ {8},
	/* 107 */ {12},
	/* 108 */ {16},
	/* 109 */ {20},
	/* 110 */ {24},
	/* 111 */ {28},
	/* 112 */ {0},
	/* 113 */ {4},
	/* 114 */ {8},
	/* 115 */ {12},
	/* 116 */ {16},
	/* 117 */ {20},
	/* 118 */ {24},
	/* 119 */ {28},
	/* 120 */ {0},
	/* 121 */ {4},
	/* 122 */ {8},
	/* 123 */ {12},
	/* 124 */ {16},
	/* 125 */ {20},
	/* 126 */ {24},
	/* 127 */ {28},
	/* 128 */ {0},
	/* 129 */ {4},
	/* 130 */ {8},
	/* 131 */ {12},
	/* 132 */ {16},
	/* 133 */ {20},
	/* 134 */ {24},
	/* 135 */ {28},
	/* 136 */ {0},
	/* 137 */ {4},
	/* 138 */ {8},
	/* 139 */ {12},
	/* 140 */ {16},
	/* 141 */ {20},
	/* 142 */ {24},
	/* 143 */ {28},
	/* 144 */ {0},
	/* 145 */ {4},
	/* 146 */ {8},
	/* 147 */ {12},
	/* 148 */ {16},
	/* 149 */ {20},
	/* 150 */ {24},
	/* 151 */ {28}
};


PIN_addr DATAOUT_addr[] = {
	/* 0 */ {GPIO_BASE+0x100},
	/* 1 */ {GPIO_BASE+0x100},
	/* 2 */ {GPIO_BASE+0x100},
	/* 3 */ {GPIO_BASE+0x100},
	/* 4 */ {GPIO_BASE+0x100},
	/* 5 */ {GPIO_BASE+0x100},
	/* 6 */ {GPIO_BASE+0x100},
	/* 7 */ {GPIO_BASE+0x100},
	/* 8 */ {GPIO_BASE+0x100},
	/* 9 */ {GPIO_BASE+0x100},
	/* 10 */ {GPIO_BASE+0x100},
	/* 11 */ {GPIO_BASE+0x100},
	/* 12 */ {GPIO_BASE+0x100},
	/* 13 */ {GPIO_BASE+0x100},
	/* 14 */ {GPIO_BASE+0x100},
	/* 15 */ {GPIO_BASE+0x100},
	/* 16 */ {GPIO_BASE+0x100},
	/* 17 */ {GPIO_BASE+0x100},
	/* 18 */ {GPIO_BASE+0x100},
	/* 19 */ {GPIO_BASE+0x100},
	/* 20 */ {GPIO_BASE+0x100},
	/* 21 */ {GPIO_BASE+0x100},
	/* 22 */ {GPIO_BASE+0x100},
	/* 23 */ {GPIO_BASE+0x100},
	/* 24 */ {GPIO_BASE+0x100},
	/* 25 */ {GPIO_BASE+0x100},
	/* 26 */ {GPIO_BASE+0x100},
	/* 27 */ {GPIO_BASE+0x100},
	/* 28 */ {GPIO_BASE+0x100},
	/* 29 */ {GPIO_BASE+0x100},
	/* 30 */ {GPIO_BASE+0x100},
	/* 31 */ {GPIO_BASE+0x100},
	/* 32 */ {GPIO_BASE+0x110},
	/* 33 */ {GPIO_BASE+0x110},
	/* 34 */ {GPIO_BASE+0x110},
	/* 35 */ {GPIO_BASE+0x110},
	/* 36 */ {GPIO_BASE+0x110},
	/* 37 */ {GPIO_BASE+0x110},
	/* 38 */ {GPIO_BASE+0x110},
	/* 39 */ {GPIO_BASE+0x110},
	/* 40 */ {GPIO_BASE+0x110},
	/* 41 */ {GPIO_BASE+0x110},
	/* 42 */ {GPIO_BASE+0x110},
	/* 43 */ {GPIO_BASE+0x110},
	/* 44 */ {GPIO_BASE+0x110},
	/* 45 */ {GPIO_BASE+0x110},
	/* 46 */ {GPIO_BASE+0x110},
	/* 47 */ {GPIO_BASE+0x110},
	/* 48 */ {GPIO_BASE+0x110},
	/* 49 */ {GPIO_BASE+0x110},
	/* 50 */ {GPIO_BASE+0x110},
	/* 51 */ {GPIO_BASE+0x110},
	/* 52 */ {GPIO_BASE+0x110},
	/* 53 */ {GPIO_BASE+0x110},
	/* 54 */ {GPIO_BASE+0x110},
	/* 55 */ {GPIO_BASE+0x110},
	/* 56 */ {GPIO_BASE+0x110},
	/* 57 */ {GPIO_BASE+0x110},
	/* 58 */ {GPIO_BASE+0x110},
	/* 59 */ {GPIO_BASE+0x110},
	/* 60 */ {GPIO_BASE+0x110},
	/* 61 */ {GPIO_BASE+0x110},
	/* 62 */ {GPIO_BASE+0x110},
	/* 63 */ {GPIO_BASE+0x110},
	/* 64 */ {GPIO_BASE+0x120},
	/* 65 */ {GPIO_BASE+0x120},
	/* 66 */ {GPIO_BASE+0x120},
	/* 67 */ {GPIO_BASE+0x120},
	/* 68 */ {GPIO_BASE+0x120},
	/* 69 */ {GPIO_BASE+0x120},
	/* 70 */ {GPIO_BASE+0x120},
	/* 71 */ {GPIO_BASE+0x120},
	/* 72 */ {GPIO_BASE+0x120},
	/* 73 */ {GPIO_BASE+0x120},
	/* 74 */ {GPIO_BASE+0x120},
	/* 75 */ {GPIO_BASE+0x120},
	/* 76 */ {GPIO_BASE+0x120},
	/* 77 */ {GPIO_BASE+0x120},
	/* 78 */ {GPIO_BASE+0x120},
	/* 79 */ {GPIO_BASE+0x120},
	/* 80 */ {GPIO_BASE+0x120},
	/* 81 */ {GPIO_BASE+0x120},
	/* 82 */ {GPIO_BASE+0x120},
	/* 83 */ {GPIO_BASE+0x120},
	/* 84 */ {GPIO_BASE+0x120},
	/* 85 */ {GPIO_BASE+0x120},
	/* 86 */ {GPIO_BASE+0x120},
	/* 87 */ {GPIO_BASE+0x120},
	/* 88 */ {GPIO_BASE+0x120},
	/* 89 */ {GPIO_BASE+0x120},
	/* 90 */ {GPIO_BASE+0x120},
	/* 91 */ {GPIO_BASE+0x120},
	/* 92 */ {GPIO_BASE+0x120},
	/* 93 */ {GPIO_BASE+0x120},
	/* 94 */ {GPIO_BASE+0x120},
	/* 95 */ {GPIO_BASE+0x120},
	/* 96 */ {GPIO_BASE+0x130},
	/* 97 */ {GPIO_BASE+0x130},
	/* 98 */ {GPIO_BASE+0x130},
	/* 99 */ {GPIO_BASE+0x130},
	/* 100 */ {GPIO_BASE+0x130},
	/* 101 */ {GPIO_BASE+0x130},
	/* 102 */ {GPIO_BASE+0x130},
	/* 103 */ {GPIO_BASE+0x130},
	/* 104 */ {GPIO_BASE+0x130},
	/* 105 */ {GPIO_BASE+0x130},
	/* 106 */ {GPIO_BASE+0x130},
	/* 107 */ {GPIO_BASE+0x130},
	/* 108 */ {GPIO_BASE+0x130},
	/* 109 */ {GPIO_BASE+0x130},
	/* 110 */ {GPIO_BASE+0x130},
	/* 111 */ {GPIO_BASE+0x130},
	/* 112 */ {GPIO_BASE+0x130},
	/* 113 */ {GPIO_BASE+0x130},
	/* 114 */ {GPIO_BASE+0x130},
	/* 115 */ {GPIO_BASE+0x130},
	/* 116 */ {GPIO_BASE+0x130},
	/* 117 */ {GPIO_BASE+0x130},
	/* 118 */ {GPIO_BASE+0x130},
	/* 119 */ {GPIO_BASE+0x130},
	/* 120 */ {GPIO_BASE+0x130},
	/* 121 */ {GPIO_BASE+0x130},
	/* 122 */ {GPIO_BASE+0x130},
	/* 123 */ {GPIO_BASE+0x130},
	/* 124 */ {GPIO_BASE+0x130},
	/* 125 */ {GPIO_BASE+0x130},
	/* 126 */ {GPIO_BASE+0x130},
	/* 127 */ {GPIO_BASE+0x130},
	/* 128 */ {GPIO_BASE+0x140},
	/* 129 */ {GPIO_BASE+0x140},
	/* 130 */ {GPIO_BASE+0x140},
	/* 131 */ {GPIO_BASE+0x140},
	/* 132 */ {GPIO_BASE+0x140},
	/* 133 */ {GPIO_BASE+0x140},
	/* 134 */ {GPIO_BASE+0x140},
	/* 135 */ {GPIO_BASE+0x140},
	/* 136 */ {GPIO_BASE+0x140},
	/* 137 */ {GPIO_BASE+0x140},
	/* 138 */ {GPIO_BASE+0x140},
	/* 139 */ {GPIO_BASE+0x140},
	/* 140 */ {GPIO_BASE+0x140},
	/* 141 */ {GPIO_BASE+0x140},
	/* 142 */ {GPIO_BASE+0x140},
	/* 143 */ {GPIO_BASE+0x140},
	/* 144 */ {GPIO_BASE+0x140},
	/* 145 */ {GPIO_BASE+0x140},
	/* 146 */ {GPIO_BASE+0x140},
	/* 147 */ {GPIO_BASE+0x140},
	/* 148 */ {GPIO_BASE+0x140},
	/* 149 */ {GPIO_BASE+0x140},
	/* 150 */ {GPIO_BASE+0x140},
	/* 151 */ {GPIO_BASE+0x140}
};


PIN_offset DATAOUT_offset[] = {
	/* 0 */ {0},
	/* 1 */ {1},
	/* 2 */ {2},
	/* 3 */ {3},
	/* 4 */ {4},
	/* 5 */ {5},
	/* 6 */ {6},
	/* 7 */ {7},
	/* 8 */ {8},
	/* 9 */ {9},
	/* 10 */ {10},
	/* 11 */ {11},
	/* 12 */ {12},
	/* 13 */ {13},
	/* 14 */ {14},
	/* 15 */ {15},
	/* 16 */ {16},
	/* 17 */ {17},
	/* 18 */ {18},
	/* 19 */ {19},
	/* 20 */ {20},
	/* 21 */ {21},
	/* 22 */ {22},
	/* 23 */ {23},
	/* 24 */ {24},
	/* 25 */ {25},
	/* 26 */ {26},
	/* 27 */ {27},
	/* 28 */ {28},
	/* 29 */ {29},
	/* 30 */ {30},
	/* 31 */ {31},
	/* 32 */ {0},
	/* 33 */ {1},
	/* 34 */ {2},
	/* 35 */ {3},
	/* 36 */ {4},
	/* 37 */ {5},
	/* 38 */ {6},
	/* 39 */ {7},
	/* 40 */ {8},
	/* 41 */ {9},
	/* 42 */ {10},
	/* 43 */ {11},
	/* 44 */ {12},
	/* 45 */ {13},
	/* 46 */ {14},
	/* 47 */ {15},
	/* 48 */ {16},
	/* 49 */ {17},
	/* 50 */ {18},
	/* 51 */ {19},
	/* 52 */ {20},
	/* 53 */ {21},
	/* 54 */ {22},
	/* 55 */ {23},
	/* 56 */ {24},
	/* 57 */ {25},
	/* 58 */ {26},
	/* 59 */ {27},
	/* 60 */ {28},
	/* 61 */ {29},
	/* 62 */ {30},
	/* 63 */ {31},
	/* 64 */ {0},
	/* 65 */ {1},
	/* 66 */ {2},
	/* 67 */ {3},
	/* 68 */ {4},
	/* 69 */ {5},
	/* 70 */ {6},
	/* 71 */ {7},
	/* 72 */ {8},
	/* 73 */ {9},
	/* 74 */ {10},
	/* 75 */ {11},
	/* 76 */ {12},
	/* 77 */ {13},
	/* 78 */ {14},
	/* 79 */ {15},
	/* 80 */ {16},
	/* 81 */ {17},
	/* 82 */ {18},
	/* 83 */ {19},
	/* 84 */ {20},
	/* 85 */ {21},
	/* 86 */ {22},
	/* 87 */ {23},
	/* 88 */ {24},
	/* 89 */ {25},
	/* 90 */ {26},
	/* 91 */ {27},
	/* 92 */ {28},
	/* 93 */ {29},
	/* 94 */ {30},
	/* 95 */ {31},
	/* 96 */ {0},
	/* 97 */ {1},
	/* 98 */ {2},
	/* 99 */ {3},
	/* 100 */ {4},
	/* 101 */ {5},
	/* 102 */ {6},
	/* 103 */ {7},
	/* 104 */ {8},
	/* 105 */ {9},
	/* 106 */ {10},
	/* 107 */ {11},
	/* 108 */ {12},
	/* 109 */ {13},
	/* 110 */ {14},
	/* 111 */ {15},
	/* 112 */ {16},
	/* 113 */ {17},
	/* 114 */ {18},
	/* 115 */ {19},
	/* 116 */ {20},
	/* 117 */ {21},
	/* 118 */ {22},
	/* 119 */ {23},
	/* 120 */ {24},
	/* 121 */ {25},
	/* 122 */ {26},
	/* 123 */ {27},
	/* 124 */ {28},
	/* 125 */ {29},
	/* 126 */ {30},
	/* 127 */ {31},
	/* 128 */ {0},
	/* 129 */ {1},
	/* 130 */ {2},
	/* 131 */ {3},
	/* 132 */ {4},
	/* 133 */ {5},
	/* 134 */ {6},
	/* 135 */ {7},
	/* 136 */ {8},
	/* 137 */ {9},
	/* 138 */ {10},
	/* 139 */ {11},
	/* 140 */ {12},
	/* 141 */ {13},
	/* 142 */ {14},
	/* 143 */ {15},
	/* 144 */ {16},
	/* 145 */ {17},
	/* 146 */ {18},
	/* 147 */ {19},
	/* 148 */ {20},
	/* 149 */ {21},
	/* 150 */ {22},
	/* 151 */ {23}
};


PIN_addr DIN_addr[] = {
	/* 0 */ {GPIO_BASE+0x200},
	/* 1 */ {GPIO_BASE+0x200},
	/* 2 */ {GPIO_BASE+0x200},
	/* 3 */ {GPIO_BASE+0x200},
	/* 4 */ {GPIO_BASE+0x200},
	/* 5 */ {GPIO_BASE+0x200},
	/* 6 */ {GPIO_BASE+0x200},
	/* 7 */ {GPIO_BASE+0x200},
	/* 8 */ {GPIO_BASE+0x200},
	/* 9 */ {GPIO_BASE+0x200},
	/* 10 */ {GPIO_BASE+0x200},
	/* 11 */ {GPIO_BASE+0x200},
	/* 12 */ {GPIO_BASE+0x200},
	/* 13 */ {GPIO_BASE+0x200},
	/* 14 */ {GPIO_BASE+0x200},
	/* 15 */ {GPIO_BASE+0x200},
	/* 16 */ {GPIO_BASE+0x200},
	/* 17 */ {GPIO_BASE+0x200},
	/* 18 */ {GPIO_BASE+0x200},
	/* 19 */ {GPIO_BASE+0x200},
	/* 20 */ {GPIO_BASE+0x200},
	/* 21 */ {GPIO_BASE+0x200},
	/* 22 */ {GPIO_BASE+0x200},
	/* 23 */ {GPIO_BASE+0x200},
	/* 24 */ {GPIO_BASE+0x200},
	/* 25 */ {GPIO_BASE+0x200},
	/* 26 */ {GPIO_BASE+0x200},
	/* 27 */ {GPIO_BASE+0x200},
	/* 28 */ {GPIO_BASE+0x200},
	/* 29 */ {GPIO_BASE+0x200},
	/* 30 */ {GPIO_BASE+0x200},
	/* 31 */ {GPIO_BASE+0x200},
	/* 32 */ {GPIO_BASE+0x210},
	/* 33 */ {GPIO_BASE+0x210},
	/* 34 */ {GPIO_BASE+0x210},
	/* 35 */ {GPIO_BASE+0x210},
	/* 36 */ {GPIO_BASE+0x210},
	/* 37 */ {GPIO_BASE+0x210},
	/* 38 */ {GPIO_BASE+0x210},
	/* 39 */ {GPIO_BASE+0x210},
	/* 40 */ {GPIO_BASE+0x210},
	/* 41 */ {GPIO_BASE+0x210},
	/* 42 */ {GPIO_BASE+0x210},
	/* 43 */ {GPIO_BASE+0x210},
	/* 44 */ {GPIO_BASE+0x210},
	/* 45 */ {GPIO_BASE+0x210},
	/* 46 */ {GPIO_BASE+0x210},
	/* 47 */ {GPIO_BASE+0x210},
	/* 48 */ {GPIO_BASE+0x210},
	/* 49 */ {GPIO_BASE+0x210},
	/* 50 */ {GPIO_BASE+0x210},
	/* 51 */ {GPIO_BASE+0x210},
	/* 52 */ {GPIO_BASE+0x210},
	/* 53 */ {GPIO_BASE+0x210},
	/* 54 */ {GPIO_BASE+0x210},
	/* 55 */ {GPIO_BASE+0x210},
	/* 56 */ {GPIO_BASE+0x210},
	/* 57 */ {GPIO_BASE+0x210},
	/* 58 */ {GPIO_BASE+0x210},
	/* 59 */ {GPIO_BASE+0x210},
	/* 60 */ {GPIO_BASE+0x210},
	/* 61 */ {GPIO_BASE+0x210},
	/* 62 */ {GPIO_BASE+0x210},
	/* 63 */ {GPIO_BASE+0x210},
	/* 64 */ {GPIO_BASE+0x220},
	/* 65 */ {GPIO_BASE+0x220},
	/* 66 */ {GPIO_BASE+0x220},
	/* 67 */ {GPIO_BASE+0x220},
	/* 68 */ {GPIO_BASE+0x220},
	/* 69 */ {GPIO_BASE+0x220},
	/* 70 */ {GPIO_BASE+0x220},
	/* 71 */ {GPIO_BASE+0x220},
	/* 72 */ {GPIO_BASE+0x220},
	/* 73 */ {GPIO_BASE+0x220},
	/* 74 */ {GPIO_BASE+0x220},
	/* 75 */ {GPIO_BASE+0x220},
	/* 76 */ {GPIO_BASE+0x220},
	/* 77 */ {GPIO_BASE+0x220},
	/* 78 */ {GPIO_BASE+0x220},
	/* 79 */ {GPIO_BASE+0x220},
	/* 80 */ {GPIO_BASE+0x220},
	/* 81 */ {GPIO_BASE+0x220},
	/* 82 */ {GPIO_BASE+0x220},
	/* 83 */ {GPIO_BASE+0x220},
	/* 84 */ {GPIO_BASE+0x220},
	/* 85 */ {GPIO_BASE+0x220},
	/* 86 */ {GPIO_BASE+0x220},
	/* 87 */ {GPIO_BASE+0x220},
	/* 88 */ {GPIO_BASE+0x220},
	/* 89 */ {GPIO_BASE+0x220},
	/* 90 */ {GPIO_BASE+0x220},
	/* 91 */ {GPIO_BASE+0x220},
	/* 92 */ {GPIO_BASE+0x220},
	/* 93 */ {GPIO_BASE+0x220},
	/* 94 */ {GPIO_BASE+0x220},
	/* 95 */ {GPIO_BASE+0x220},
	/* 96 */ {GPIO_BASE+0x230},
	/* 97 */ {GPIO_BASE+0x230},
	/* 98 */ {GPIO_BASE+0x230},
	/* 99 */ {GPIO_BASE+0x230},
	/* 100 */ {GPIO_BASE+0x230},
	/* 101 */ {GPIO_BASE+0x230},
	/* 102 */ {GPIO_BASE+0x230},
	/* 103 */ {GPIO_BASE+0x230},
	/* 104 */ {GPIO_BASE+0x230},
	/* 105 */ {GPIO_BASE+0x230},
	/* 106 */ {GPIO_BASE+0x230},
	/* 107 */ {GPIO_BASE+0x230},
	/* 108 */ {GPIO_BASE+0x230},
	/* 109 */ {GPIO_BASE+0x230},
	/* 110 */ {GPIO_BASE+0x230},
	/* 111 */ {GPIO_BASE+0x230},
	/* 112 */ {GPIO_BASE+0x230},
	/* 113 */ {GPIO_BASE+0x230},
	/* 114 */ {GPIO_BASE+0x230},
	/* 115 */ {GPIO_BASE+0x230},
	/* 116 */ {GPIO_BASE+0x230},
	/* 117 */ {GPIO_BASE+0x230},
	/* 118 */ {GPIO_BASE+0x230},
	/* 119 */ {GPIO_BASE+0x230},
	/* 120 */ {GPIO_BASE+0x230},
	/* 121 */ {GPIO_BASE+0x230},
	/* 122 */ {GPIO_BASE+0x230},
	/* 123 */ {GPIO_BASE+0x230},
	/* 124 */ {GPIO_BASE+0x230},
	/* 125 */ {GPIO_BASE+0x230},
	/* 126 */ {GPIO_BASE+0x230},
	/* 127 */ {GPIO_BASE+0x230},
	/* 128 */ {GPIO_BASE+0x240},
	/* 129 */ {GPIO_BASE+0x240},
	/* 130 */ {GPIO_BASE+0x240},
	/* 131 */ {GPIO_BASE+0x240},
	/* 132 */ {GPIO_BASE+0x240},
	/* 133 */ {GPIO_BASE+0x240},
	/* 134 */ {GPIO_BASE+0x240},
	/* 135 */ {GPIO_BASE+0x240},
	/* 136 */ {GPIO_BASE+0x240},
	/* 137 */ {GPIO_BASE+0x240},
	/* 138 */ {GPIO_BASE+0x240},
	/* 139 */ {GPIO_BASE+0x240},
	/* 140 */ {GPIO_BASE+0x240},
	/* 141 */ {GPIO_BASE+0x240},
	/* 142 */ {GPIO_BASE+0x240},
	/* 143 */ {GPIO_BASE+0x240},
	/* 144 */ {GPIO_BASE+0x240},
	/* 145 */ {GPIO_BASE+0x240},
	/* 146 */ {GPIO_BASE+0x240},
	/* 147 */ {GPIO_BASE+0x240},
	/* 148 */ {GPIO_BASE+0x240},
	/* 149 */ {GPIO_BASE+0x240},
	/* 150 */ {GPIO_BASE+0x240},
	/* 151 */ {GPIO_BASE+0x240}
};


PIN_offset DIN_offset[] = {
	/* 0 */ {0},
	/* 1 */ {1},
	/* 2 */ {2},
	/* 3 */ {3},
	/* 4 */ {4},
	/* 5 */ {5},
	/* 6 */ {6},
	/* 7 */ {7},
	/* 8 */ {8},
	/* 9 */ {9},
	/* 10 */ {10},
	/* 11 */ {11},
	/* 12 */ {12},
	/* 13 */ {13},
	/* 14 */ {14},
	/* 15 */ {15},
	/* 16 */ {16},
	/* 17 */ {17},
	/* 18 */ {18},
	/* 19 */ {19},
	/* 20 */ {20},
	/* 21 */ {21},
	/* 22 */ {22},
	/* 23 */ {23},
	/* 24 */ {24},
	/* 25 */ {25},
	/* 26 */ {26},
	/* 27 */ {27},
	/* 28 */ {28},
	/* 29 */ {29},
	/* 30 */ {30},
	/* 31 */ {31},
	/* 32 */ {0},
	/* 33 */ {1},
	/* 34 */ {2},
	/* 35 */ {3},
	/* 36 */ {4},
	/* 37 */ {5},
	/* 38 */ {6},
	/* 39 */ {7},
	/* 40 */ {8},
	/* 41 */ {9},
	/* 42 */ {10},
	/* 43 */ {11},
	/* 44 */ {12},
	/* 45 */ {13},
	/* 46 */ {14},
	/* 47 */ {15},
	/* 48 */ {16},
	/* 49 */ {17},
	/* 50 */ {18},
	/* 51 */ {19},
	/* 52 */ {20},
	/* 53 */ {21},
	/* 54 */ {22},
	/* 55 */ {23},
	/* 56 */ {24},
	/* 57 */ {25},
	/* 58 */ {26},
	/* 59 */ {27},
	/* 60 */ {28},
	/* 61 */ {29},
	/* 62 */ {30},
	/* 63 */ {31},
	/* 64 */ {0},
	/* 65 */ {1},
	/* 66 */ {2},
	/* 67 */ {3},
	/* 68 */ {4},
	/* 69 */ {5},
	/* 70 */ {6},
	/* 71 */ {7},
	/* 72 */ {8},
	/* 73 */ {9},
	/* 74 */ {10},
	/* 75 */ {11},
	/* 76 */ {12},
	/* 77 */ {13},
	/* 78 */ {14},
	/* 79 */ {15},
	/* 80 */ {16},
	/* 81 */ {17},
	/* 82 */ {18},
	/* 83 */ {19},
	/* 84 */ {20},
	/* 85 */ {21},
	/* 86 */ {22},
	/* 87 */ {23},
	/* 88 */ {24},
	/* 89 */ {25},
	/* 90 */ {26},
	/* 91 */ {27},
	/* 92 */ {28},
	/* 93 */ {29},
	/* 94 */ {30},
	/* 95 */ {31},
	/* 96 */ {0},
	/* 97 */ {1},
	/* 98 */ {2},
	/* 99 */ {3},
	/* 100 */ {4},
	/* 101 */ {5},
	/* 102 */ {6},
	/* 103 */ {7},
	/* 104 */ {8},
	/* 105 */ {9},
	/* 106 */ {10},
	/* 107 */ {11},
	/* 108 */ {12},
	/* 109 */ {13},
	/* 110 */ {14},
	/* 111 */ {15},
	/* 112 */ {16},
	/* 113 */ {17},
	/* 114 */ {18},
	/* 115 */ {19},
	/* 116 */ {20},
	/* 117 */ {21},
	/* 118 */ {22},
	/* 119 */ {23},
	/* 120 */ {24},
	/* 121 */ {25},
	/* 122 */ {26},
	/* 123 */ {27},
	/* 124 */ {28},
	/* 125 */ {29},
	/* 126 */ {30},
	/* 127 */ {31},
	/* 128 */ {0},
	/* 129 */ {1},
	/* 130 */ {2},
	/* 131 */ {3},
	/* 132 */ {4},
	/* 133 */ {5},
	/* 134 */ {6},
	/* 135 */ {7},
	/* 136 */ {8},
	/* 137 */ {9},
	/* 138 */ {10},
	/* 139 */ {11},
	/* 140 */ {12},
	/* 141 */ {13},
	/* 142 */ {14},
	/* 143 */ {15},
	/* 144 */ {16},
	/* 145 */ {17},
	/* 146 */ {18},
	/* 147 */ {19},
	/* 148 */ {20},
	/* 149 */ {21},
	/* 150 */ {22},
	/* 151 */ {23}
};


PIN_addr DIR_addr[] = {
	/* 0 */ {GPIO_BASE+0x000},
	/* 1 */ {GPIO_BASE+0x000},
	/* 2 */ {GPIO_BASE+0x000},
	/* 3 */ {GPIO_BASE+0x000},
	/* 4 */ {GPIO_BASE+0x000},
	/* 5 */ {GPIO_BASE+0x000},
	/* 6 */ {GPIO_BASE+0x000},
	/* 7 */ {GPIO_BASE+0x000},
	/* 8 */ {GPIO_BASE+0x000},
	/* 9 */ {GPIO_BASE+0x000},
	/* 10 */ {GPIO_BASE+0x000},
	/* 11 */ {GPIO_BASE+0x000},
	/* 12 */ {GPIO_BASE+0x000},
	/* 13 */ {GPIO_BASE+0x000},
	/* 14 */ {GPIO_BASE+0x000},
	/* 15 */ {GPIO_BASE+0x000},
	/* 16 */ {GPIO_BASE+0x000},
	/* 17 */ {GPIO_BASE+0x000},
	/* 18 */ {GPIO_BASE+0x000},
	/* 19 */ {GPIO_BASE+0x000},
	/* 20 */ {GPIO_BASE+0x000},
	/* 21 */ {GPIO_BASE+0x000},
	/* 22 */ {GPIO_BASE+0x000},
	/* 23 */ {GPIO_BASE+0x000},
	/* 24 */ {GPIO_BASE+0x000},
	/* 25 */ {GPIO_BASE+0x000},
	/* 26 */ {GPIO_BASE+0x000},
	/* 27 */ {GPIO_BASE+0x000},
	/* 28 */ {GPIO_BASE+0x000},
	/* 29 */ {GPIO_BASE+0x000},
	/* 30 */ {GPIO_BASE+0x000},
	/* 31 */ {GPIO_BASE+0x000},
	/* 32 */ {GPIO_BASE+0x010},
	/* 33 */ {GPIO_BASE+0x010},
	/* 34 */ {GPIO_BASE+0x010},
	/* 35 */ {GPIO_BASE+0x010},
	/* 36 */ {GPIO_BASE+0x010},
	/* 37 */ {GPIO_BASE+0x010},
	/* 38 */ {GPIO_BASE+0x010},
	/* 39 */ {GPIO_BASE+0x010},
	/* 40 */ {GPIO_BASE+0x010},
	/* 41 */ {GPIO_BASE+0x010},
	/* 42 */ {GPIO_BASE+0x010},
	/* 43 */ {GPIO_BASE+0x010},
	/* 44 */ {GPIO_BASE+0x010},
	/* 45 */ {GPIO_BASE+0x010},
	/* 46 */ {GPIO_BASE+0x010},
	/* 47 */ {GPIO_BASE+0x010},
	/* 48 */ {GPIO_BASE+0x010},
	/* 49 */ {GPIO_BASE+0x010},
	/* 50 */ {GPIO_BASE+0x010},
	/* 51 */ {GPIO_BASE+0x010},
	/* 52 */ {GPIO_BASE+0x010},
	/* 53 */ {GPIO_BASE+0x010},
	/* 54 */ {GPIO_BASE+0x010},
	/* 55 */ {GPIO_BASE+0x010},
	/* 56 */ {GPIO_BASE+0x010},
	/* 57 */ {GPIO_BASE+0x010},
	/* 58 */ {GPIO_BASE+0x010},
	/* 59 */ {GPIO_BASE+0x010},
	/* 60 */ {GPIO_BASE+0x010},
	/* 61 */ {GPIO_BASE+0x010},
	/* 62 */ {GPIO_BASE+0x010},
	/* 63 */ {GPIO_BASE+0x010},
	/* 64 */ {GPIO_BASE+0x020},
	/* 65 */ {GPIO_BASE+0x020},
	/* 66 */ {GPIO_BASE+0x020},
	/* 67 */ {GPIO_BASE+0x020},
	/* 68 */ {GPIO_BASE+0x020},
	/* 69 */ {GPIO_BASE+0x020},
	/* 70 */ {GPIO_BASE+0x020},
	/* 71 */ {GPIO_BASE+0x020},
	/* 72 */ {GPIO_BASE+0x020},
	/* 73 */ {GPIO_BASE+0x020},
	/* 74 */ {GPIO_BASE+0x020},
	/* 75 */ {GPIO_BASE+0x020},
	/* 76 */ {GPIO_BASE+0x020},
	/* 77 */ {GPIO_BASE+0x020},
	/* 78 */ {GPIO_BASE+0x020},
	/* 79 */ {GPIO_BASE+0x020},
	/* 80 */ {GPIO_BASE+0x020},
	/* 81 */ {GPIO_BASE+0x020},
	/* 82 */ {GPIO_BASE+0x020},
	/* 83 */ {GPIO_BASE+0x020},
	/* 84 */ {GPIO_BASE+0x020},
	/* 85 */ {GPIO_BASE+0x020},
	/* 86 */ {GPIO_BASE+0x020},
	/* 87 */ {GPIO_BASE+0x020},
	/* 88 */ {GPIO_BASE+0x020},
	/* 89 */ {GPIO_BASE+0x020},
	/* 90 */ {GPIO_BASE+0x020},
	/* 91 */ {GPIO_BASE+0x020},
	/* 92 */ {GPIO_BASE+0x020},
	/* 93 */ {GPIO_BASE+0x020},
	/* 94 */ {GPIO_BASE+0x020},
	/* 95 */ {GPIO_BASE+0x020},
	/* 96 */ {GPIO_BASE+0x030},
	/* 97 */ {GPIO_BASE+0x030},
	/* 98 */ {GPIO_BASE+0x030},
	/* 99 */ {GPIO_BASE+0x030},
	/* 100 */ {GPIO_BASE+0x030},
	/* 101 */ {GPIO_BASE+0x030},
	/* 102 */ {GPIO_BASE+0x030},
	/* 103 */ {GPIO_BASE+0x030},
	/* 104 */ {GPIO_BASE+0x030},
	/* 105 */ {GPIO_BASE+0x030},
	/* 106 */ {GPIO_BASE+0x030},
	/* 107 */ {GPIO_BASE+0x030},
	/* 108 */ {GPIO_BASE+0x030},
	/* 109 */ {GPIO_BASE+0x030},
	/* 110 */ {GPIO_BASE+0x030},
	/* 111 */ {GPIO_BASE+0x030},
	/* 112 */ {GPIO_BASE+0x030},
	/* 113 */ {GPIO_BASE+0x030},
	/* 114 */ {GPIO_BASE+0x030},
	/* 115 */ {GPIO_BASE+0x030},
	/* 116 */ {GPIO_BASE+0x030},
	/* 117 */ {GPIO_BASE+0x030},
	/* 118 */ {GPIO_BASE+0x030},
	/* 119 */ {GPIO_BASE+0x030},
	/* 120 */ {GPIO_BASE+0x030},
	/* 121 */ {GPIO_BASE+0x030},
	/* 122 */ {GPIO_BASE+0x030},
	/* 123 */ {GPIO_BASE+0x030},
	/* 124 */ {GPIO_BASE+0x030},
	/* 125 */ {GPIO_BASE+0x030},
	/* 126 */ {GPIO_BASE+0x030},
	/* 127 */ {GPIO_BASE+0x030},
	/* 128 */ {GPIO_BASE+0x040},
	/* 129 */ {GPIO_BASE+0x040},
	/* 130 */ {GPIO_BASE+0x040},
	/* 131 */ {GPIO_BASE+0x040},
	/* 132 */ {GPIO_BASE+0x040},
	/* 133 */ {GPIO_BASE+0x040},
	/* 134 */ {GPIO_BASE+0x040},
	/* 135 */ {GPIO_BASE+0x040},
	/* 136 */ {GPIO_BASE+0x040},
	/* 137 */ {GPIO_BASE+0x040},
	/* 138 */ {GPIO_BASE+0x040},
	/* 139 */ {GPIO_BASE+0x040},
	/* 140 */ {GPIO_BASE+0x040},
	/* 141 */ {GPIO_BASE+0x040},
	/* 142 */ {GPIO_BASE+0x040},
	/* 143 */ {GPIO_BASE+0x040},
	/* 144 */ {GPIO_BASE+0x040},
	/* 145 */ {GPIO_BASE+0x040},
	/* 146 */ {GPIO_BASE+0x040},
	/* 147 */ {GPIO_BASE+0x040},
	/* 148 */ {GPIO_BASE+0x040},
	/* 149 */ {GPIO_BASE+0x040},
	/* 150 */ {GPIO_BASE+0x040},
	/* 151 */ {GPIO_BASE+0x040}
};


PIN_offset DIR_offset[] = {
	/* 0 */ {0},
	/* 1 */ {1},
	/* 2 */ {2},
	/* 3 */ {3},
	/* 4 */ {4},
	/* 5 */ {5},
	/* 6 */ {6},
	/* 7 */ {7},
	/* 8 */ {8},
	/* 9 */ {9},
	/* 10 */ {10},
	/* 11 */ {11},
	/* 12 */ {12},
	/* 13 */ {13},
	/* 14 */ {14},
	/* 15 */ {15},
	/* 16 */ {16},
	/* 17 */ {17},
	/* 18 */ {18},
	/* 19 */ {19},
	/* 20 */ {20},
	/* 21 */ {21},
	/* 22 */ {22},
	/* 23 */ {23},
	/* 24 */ {24},
	/* 25 */ {25},
	/* 26 */ {26},
	/* 27 */ {27},
	/* 28 */ {28},
	/* 29 */ {29},
	/* 30 */ {30},
	/* 31 */ {31},
	/* 32 */ {0},
	/* 33 */ {1},
	/* 34 */ {2},
	/* 35 */ {3},
	/* 36 */ {4},
	/* 37 */ {5},
	/* 38 */ {6},
	/* 39 */ {7},
	/* 40 */ {8},
	/* 41 */ {9},
	/* 42 */ {10},
	/* 43 */ {11},
	/* 44 */ {12},
	/* 45 */ {13},
	/* 46 */ {14},
	/* 47 */ {15},
	/* 48 */ {16},
	/* 49 */ {17},
	/* 50 */ {18},
	/* 51 */ {19},
	/* 52 */ {20},
	/* 53 */ {21},
	/* 54 */ {22},
	/* 55 */ {23},
	/* 56 */ {24},
	/* 57 */ {25},
	/* 58 */ {26},
	/* 59 */ {27},
	/* 60 */ {28},
	/* 61 */ {29},
	/* 62 */ {30},
	/* 63 */ {31},
	/* 64 */ {0},
	/* 65 */ {1},
	/* 66 */ {2},
	/* 67 */ {3},
	/* 68 */ {4},
	/* 69 */ {5},
	/* 70 */ {6},
	/* 71 */ {7},
	/* 72 */ {8},
	/* 73 */ {9},
	/* 74 */ {10},
	/* 75 */ {11},
	/* 76 */ {12},
	/* 77 */ {13},
	/* 78 */ {14},
	/* 79 */ {15},
	/* 80 */ {16},
	/* 81 */ {17},
	/* 82 */ {18},
	/* 83 */ {19},
	/* 84 */ {20},
	/* 85 */ {21},
	/* 86 */ {22},
	/* 87 */ {23},
	/* 88 */ {24},
	/* 89 */ {25},
	/* 90 */ {26},
	/* 91 */ {27},
	/* 92 */ {28},
	/* 93 */ {29},
	/* 94 */ {30},
	/* 95 */ {31},
	/* 96 */ {0},
	/* 97 */ {1},
	/* 98 */ {2},
	/* 99 */ {3},
	/* 100 */ {4},
	/* 101 */ {5},
	/* 102 */ {6},
	/* 103 */ {7},
	/* 104 */ {8},
	/* 105 */ {9},
	/* 106 */ {10},
	/* 107 */ {11},
	/* 108 */ {12},
	/* 109 */ {13},
	/* 110 */ {14},
	/* 111 */ {15},
	/* 112 */ {16},
	/* 113 */ {17},
	/* 114 */ {18},
	/* 115 */ {19},
	/* 116 */ {20},
	/* 117 */ {21},
	/* 118 */ {22},
	/* 119 */ {23},
	/* 120 */ {24},
	/* 121 */ {25},
	/* 122 */ {26},
	/* 123 */ {27},
	/* 124 */ {28},
	/* 125 */ {29},
	/* 126 */ {30},
	/* 127 */ {31},
	/* 128 */ {0},
	/* 129 */ {1},
	/* 130 */ {2},
	/* 131 */ {3},
	/* 132 */ {4},
	/* 133 */ {5},
	/* 134 */ {6},
	/* 135 */ {7},
	/* 136 */ {8},
	/* 137 */ {9},
	/* 138 */ {10},
	/* 139 */ {11},
	/* 140 */ {12},
	/* 141 */ {13},
	/* 142 */ {14},
	/* 143 */ {15},
	/* 144 */ {16},
	/* 145 */ {17},
	/* 146 */ {18},
	/* 147 */ {19},
	/* 148 */ {20},
	/* 149 */ {21},
	/* 150 */ {22},
	/* 151 */ {23}
};


PIN_addr DRV_addr[] = {
	/* 0 */ {IOCFG_RM_BASE+0x0A0},
	/* 1 */ {IOCFG_RM_BASE+0x0A0},
	/* 2 */ {IOCFG_RM_BASE+0x0A0},
	/* 3 */ {IOCFG_RM_BASE+0x0A0},
	/* 4 */ {IOCFG_RM_BASE+0x0A0},
	/* 5 */ {IOCFG_RM_BASE+0x0A0},
	/* 6 */ {IOCFG_RM_BASE+0x0A0},
	/* 7 */ {IOCFG_RM_BASE+0x0A0},
	/* 8 */ {IOCFG_RM_BASE+0x0A0},
	/* 9 */ {IOCFG_RM_BASE+0x0B0},
	/* 10 */ {IOCFG_RM_BASE+0x0B0},
	/* 11 */ {IOCFG_LT_BASE+0x0A0},
	/* 12 */ {IOCFG_LT_BASE+0x0A0},
	/* 13 */ {IOCFG_LM_BASE+0x0A0},
	/* 14 */ {IOCFG_LM_BASE+0x0A0},
	/* 15 */ {IOCFG_LM_BASE+0x0A0},
	/* 16 */ {IOCFG_LM_BASE+0x0A0},
	/* 17 */ {IOCFG_LM_BASE+0x0A0},
	/* 18 */ {IOCFG_LM_BASE+0x0A0},
	/* 19 */ {IOCFG_LM_BASE+0x0A0},
	/* 20 */ {IOCFG_LM_BASE+0x0A0},
	/* 21 */ {IOCFG_LM_BASE+0x0A0},
	/* 22 */ {IOCFG_LM_BASE+0x0A0},
	/* 23 */ {IOCFG_LM_BASE+0x0A0},
	/* 24 */ {IOCFG_LM_BASE+0x0A0},
	/* 25 */ {IOCFG_LM_BASE+0x0A0},
	/* 26 */ {IOCFG_LM_BASE+0x0A0},
	/* 27 */ {IOCFG_LM_BASE+0x0A0},
	/* 28 */ {IOCFG_LM_BASE+0x0A0},
	/* 29 */ {IOCFG_LM_BASE+0x0A0},
	/* 30 */ {IOCFG_LM_BASE+0x0A0},
	/* 31 */ {IOCFG_LM_BASE+0x0A0},
	/* 32 */ {IOCFG_LM_BASE+0x0A0},
	/* 33 */ {IOCFG_LM_BASE+0x0A0},
	/* 34 */ {IOCFG_LM_BASE+0x0A0},
	/* 35 */ {IOCFG_LB_BASE+0x0A0},
	/* 36 */ {IOCFG_LB_BASE+0x0A0},
	/* 37 */ {IOCFG_LB_BASE+0x0A0},
	/* 38 */ {IOCFG_LB_BASE+0x0A0},
	/* 39 */ {IOCFG_LB_BASE+0x0A0},
	/* 40 */ {IOCFG_LB_BASE+0x0A0},
	/* 41 */ {IOCFG_LB_BASE+0x0A0},
	/* 42 */ {IOCFG_LB_BASE+0x0A0},
	/* 43 */ {IOCFG_LB_BASE+0x0A0},
	/* 44 */ {IOCFG_LB_BASE+0x0A0},
	/* 45 */ {IOCFG_LB_BASE+0x0A0},
	/* 46 */ {IOCFG_LB_BASE+0x0A0},
	/* 47 */ {IOCFG_LB_BASE+0x0A0},
	/* 48 */ {IOCFG_LB_BASE+0x0A0},
	/* 49 */ {IOCFG_LB_BASE+0x0A0},
	/* 50 */ {IOCFG_BL_BASE+0x0A0},
	/* 51 */ {IOCFG_BL_BASE+0x0A0},
	/* 52 */ {IOCFG_BL_BASE+0x0A0},
	/* 53 */ {IOCFG_BL_BASE+0x0A0},
	/* 54 */ {IOCFG_BL_BASE+0x0A0},
	/* 55 */ {IOCFG_BL_BASE+0x0A0},
	/* 56 */ {IOCFG_BL_BASE+0x0A0},
	/* 57 */ {IOCFG_BL_BASE+0x0A0},
	/* 58 */ {IOCFG_BL_BASE+0x0A0},
	/* 59 */ {IOCFG_BL_BASE+0x0A0},
	/* 60 */ {IOCFG_BL_BASE+0x0A0},
	/* 61 */ {IOCFG_RB_BASE+0x0A0},
	/* 62 */ {IOCFG_RB_BASE+0x0A0},
	/* 63 */ {IOCFG_RB_BASE+0x0A0},
	/* 64 */ {IOCFG_RB_BASE+0x0A0},
	/* 65 */ {IOCFG_RB_BASE+0x0A0},
	/* 66 */ {IOCFG_RB_BASE+0x0A0},
	/* 67 */ {IOCFG_RB_BASE+0x0A0},
	/* 68 */ {IOCFG_RB_BASE+0x0A0},
	/* 69 */ {IOCFG_RB_BASE+0x0A0},
	/* 70 */ {IOCFG_RB_BASE+0x0A0},
	/* 71 */ {IOCFG_RB_BASE+0x0A0},
	/* 72 */ {IOCFG_RB_BASE+0x0A0},
	/* 73 */ {IOCFG_RB_BASE+0x0A0},
	/* 74 */ {IOCFG_RB_BASE+0x0A0},
	/* 75 */ {IOCFG_RB_BASE+0x0A0},
	/* 76 */ {IOCFG_RB_BASE+0x0A0},
	/* 77 */ {IOCFG_RB_BASE+0x0A0},
	/* 78 */ {IOCFG_RB_BASE+0x0A0},
	/* 79 */ {IOCFG_RB_BASE+0x0A0},
	/* 80 */ {IOCFG_RB_BASE+0x0A0},
	/* 81 */ {IOCFG_RB_BASE+0x0A0},
	/* 82 */ {IOCFG_RB_BASE+0x0A0},
	/* 83 */ {IOCFG_RB_BASE+0x0A0},
	/* 84 */ {IOCFG_RB_BASE+0x0A0},
	/* 85 */ {IOCFG_RB_BASE+0x0A0},
	/* 86 */ {IOCFG_RB_BASE+0x0A0},
	/* 87 */ {IOCFG_RB_BASE+0x0A0},
	/* 88 */ {IOCFG_RB_BASE+0x0A0},
	/* 89 */ {IOCFG_RM_BASE+0x0B0},
	/* 90 */ {IOCFG_RM_BASE+0x0A0},
	/* 91 */ {IOCFG_RM_BASE+0x0A0},
	/* 92 */ {IOCFG_RM_BASE+0x0A0},
	/* 93 */ {IOCFG_RM_BASE+0x0A0},
	/* 94 */ {IOCFG_RM_BASE+0x0A0},
	/* 95 */ {IOCFG_RM_BASE+0x0A0},
	/* 96 */ {IOCFG_RM_BASE+0x0A0},
	/* 97 */ {IOCFG_RM_BASE+0x0A0},
	/* 98 */ {IOCFG_RM_BASE+0x0A0},
	/* 99 */ {IOCFG_RM_BASE+0x0A0},
	/* 100 */ {IOCFG_RM_BASE+0x0B0},
	/* 101 */ {IOCFG_RM_BASE+0x0B0},
	/* 102 */ {IOCFG_RM_BASE+0x0B0},
	/* 103 */ {IOCFG_RM_BASE+0x0B0},
	/* 104 */ {IOCFG_RM_BASE+0x0B0},
	/* 105 */ {IOCFG_RM_BASE+0x0B0},
	/* 106 */ {IOCFG_RM_BASE+0x0B0},
	/* 107 */ {IOCFG_RT_BASE+0x0A0},
	/* 108 */ {IOCFG_RT_BASE+0x0A0},
	/* 109 */ {IOCFG_RT_BASE+0x0A0},
	/* 110 */ {IOCFG_RT_BASE+0x0A0},
	/* 111 */ {IOCFG_RT_BASE+0x0A0},
	/* 112 */ {IOCFG_RT_BASE+0x0A0},
	/* 113 */ {IOCFG_RT_BASE+0x0A0},
	/* 114 */ {IOCFG_RT_BASE+0x0A0},
	/* 115 */ {IOCFG_RT_BASE+0x0A0},
	/* 116 */ {IOCFG_RT_BASE+0x0A0},
	/* 117 */ {IOCFG_RT_BASE+0x0A0},
	/* 118 */ {IOCFG_RT_BASE+0x0A0},
	/* 119 */ {IOCFG_RT_BASE+0x0A0},
	/* 120 */ {IOCFG_RT_BASE+0x0A0},
	/* 121 */ {IOCFG_RT_BASE+0x0A0},
	/* 122 */ {IOCFG_TL_BASE+0x0A0},
	/* 123 */ {IOCFG_TL_BASE+0x0A0},
	/* 124 */ {IOCFG_TL_BASE+0x0A0},
	/* 125 */ {IOCFG_TL_BASE+0x0A0},
	/* 126 */ {IOCFG_TL_BASE+0x0A0},
	/* 127 */ {IOCFG_TL_BASE+0x0A0},
	/* 128 */ {IOCFG_TL_BASE+0x0A0},
	/* 129 */ {IOCFG_TL_BASE+0x0A0},
	/* 130 */ {IOCFG_TL_BASE+0x0A0},
	/* 131 */ {IOCFG_TL_BASE+0x0A0},
	/* 132 */ {IOCFG_TL_BASE+0x0A0},
	/* 133 */ {IOCFG_TL_BASE+0x0A0},
	/* 134 */ {IOCFG_LT_BASE+0x0A0},
	/* 135 */ {IOCFG_LT_BASE+0x0A0},
	/* 136 */ {IOCFG_LT_BASE+0x0A0},
	/* 137 */ {IOCFG_LT_BASE+0x0A0},
	/* 138 */ {IOCFG_LT_BASE+0x0A0},
	/* 139 */ {IOCFG_LT_BASE+0x0A0},
	/* 140 */ {IOCFG_LT_BASE+0x0A0},
	/* 141 */ {IOCFG_LT_BASE+0x0A0},
	/* 142 */ {IOCFG_LT_BASE+0x0A0},
	/* 143 */ {IOCFG_LT_BASE+0x0A0},
	/* 144 */ {IOCFG_LT_BASE+0x0A0},
	/* 145 */ {IOCFG_LT_BASE+0x0A0},
	/* 146 */ {IOCFG_LT_BASE+0x0A0},
	/* 147 */ {IOCFG_LT_BASE+0x0A0},
	/* 148 */ {IOCFG_LT_BASE+0x0A0},
	/* 149 */ {IOCFG_LT_BASE+0x0A0},
	/* 150 */ {IOCFG_BL_BASE+0x0A0},
	/* 151 */ {IOCFG_BL_BASE+0x0A0}
};


PIN_offset DRV_offset[] = {
	/* 0 */ {12},
	/* 1 */ {12},
	/* 2 */ {12},
	/* 3 */ {12},
	/* 4 */ {16},
	/* 5 */ {16},
	/* 6 */ {16},
	/* 7 */ {16},
	/* 8 */ {0},
	/* 9 */ {12},
	/* 10 */ {12},
	/* 11 */ {12},
	/* 12 */ {28},
	/* 13 */ {0},
	/* 14 */ {0},
	/* 15 */ {0},
	/* 16 */ {0},
	/* 17 */ {4},
	/* 18 */ {4},
	/* 19 */ {4},
	/* 20 */ {4},
	/* 21 */ {8},
	/* 22 */ {8},
	/* 23 */ {8},
	/* 24 */ {8},
	/* 25 */ {12},
	/* 26 */ {12},
	/* 27 */ {12},
	/* 28 */ {12},
	/* 29 */ {16},
	/* 30 */ {20},
	/* 31 */ {24},
	/* 32 */ {20},
	/* 33 */ {20},
	/* 34 */ {20},
	/* 35 */ {0},
	/* 36 */ {0},
	/* 37 */ {0},
	/* 38 */ {4},
	/* 39 */ {4},
	/* 40 */ {4},
	/* 41 */ {8},
	/* 42 */ {8},
	/* 43 */ {12},
	/* 44 */ {12},
	/* 45 */ {12},
	/* 46 */ {16},
	/* 47 */ {16},
	/* 48 */ {20},
	/* 49 */ {20},
	/* 50 */ {0},
	/* 51 */ {0},
	/* 52 */ {4},
	/* 53 */ {4},
	/* 54 */ {4},
	/* 55 */ {4},
	/* 56 */ {4},
	/* 57 */ {4},
	/* 58 */ {8},
	/* 59 */ {8},
	/* 60 */ {8},
	/* 61 */ {0},
	/* 62 */ {0},
	/* 63 */ {0},
	/* 64 */ {0},
	/* 65 */ {4},
	/* 66 */ {4},
	/* 67 */ {4},
	/* 68 */ {4},
	/* 69 */ {8},
	/* 70 */ {8},
	/* 71 */ {8},
	/* 72 */ {12},
	/* 73 */ {12},
	/* 74 */ {12},
	/* 75 */ {12},
	/* 76 */ {12},
	/* 77 */ {16},
	/* 78 */ {16},
	/* 79 */ {16},
	/* 80 */ {16},
	/* 81 */ {20},
	/* 82 */ {24},
	/* 83 */ {24},
	/* 84 */ {20},
	/* 85 */ {28},
	/* 86 */ {28},
	/* 87 */ {28},
	/* 88 */ {28},
	/* 89 */ {8},
	/* 90 */ {4},
	/* 91 */ {8},
	/* 92 */ {8},
	/* 93 */ {8},
	/* 94 */ {8},
	/* 95 */ {20},
	/* 96 */ {20},
	/* 97 */ {24},
	/* 98 */ {24},
	/* 99 */ {28},
	/* 100 */ {0},
	/* 101 */ {4},
	/* 102 */ {4},
	/* 103 */ {16},
	/* 104 */ {16},
	/* 105 */ {20},
	/* 106 */ {20},
	/* 107 */ {0},
	/* 108 */ {0},
	/* 109 */ {0},
	/* 110 */ {4},
	/* 111 */ {4},
	/* 112 */ {8},
	/* 113 */ {8},
	/* 114 */ {8},
	/* 115 */ {8},
	/* 116 */ {12},
	/* 117 */ {16},
	/* 118 */ {20},
	/* 119 */ {12},
	/* 120 */ {12},
	/* 121 */ {12},
	/* 122 */ {0},
	/* 123 */ {4},
	/* 124 */ {8},
	/* 125 */ {4},
	/* 126 */ {4},
	/* 127 */ {4},
	/* 128 */ {4},
	/* 129 */ {4},
	/* 130 */ {4},
	/* 131 */ {12},
	/* 132 */ {4},
	/* 133 */ {16},
	/* 134 */ {0},
	/* 135 */ {4},
	/* 136 */ {8},
	/* 137 */ {8},
	/* 138 */ {8},
	/* 139 */ {8},
	/* 140 */ {8},
	/* 141 */ {8},
	/* 142 */ {8},
	/* 143 */ {8},
	/* 144 */ {16},
	/* 145 */ {16},
	/* 146 */ {16},
	/* 147 */ {16},
	/* 148 */ {20},
	/* 149 */ {24},
	/* 150 */ {8},
	/* 151 */ {8}
};


PIN_addr TDSEL_addr[] = {
	/* 0 */ {IOCFG_RM_BASE+0x020},
	/* 1 */ {IOCFG_RM_BASE+0x020},
	/* 2 */ {IOCFG_RM_BASE+0x020},
	/* 3 */ {IOCFG_RM_BASE+0x020},
	/* 4 */ {IOCFG_RM_BASE+0x020},
	/* 5 */ {IOCFG_RM_BASE+0x020},
	/* 6 */ {IOCFG_RM_BASE+0x020},
	/* 7 */ {IOCFG_RM_BASE+0x020},
	/* 8 */ {IOCFG_RM_BASE+0x020},
	/* 9 */ {IOCFG_RM_BASE+0x030},
	/* 10 */ {IOCFG_RM_BASE+0x030},
	/* 11 */ {IOCFG_LT_BASE+0x020},
	/* 12 */ {IOCFG_LT_BASE+0x020},
	/* 13 */ {IOCFG_LM_BASE+0x020},
	/* 14 */ {IOCFG_LM_BASE+0x020},
	/* 15 */ {IOCFG_LM_BASE+0x020},
	/* 16 */ {IOCFG_LM_BASE+0x020},
	/* 17 */ {IOCFG_LM_BASE+0x020},
	/* 18 */ {IOCFG_LM_BASE+0x020},
	/* 19 */ {IOCFG_LM_BASE+0x020},
	/* 20 */ {IOCFG_LM_BASE+0x020},
	/* 21 */ {IOCFG_LM_BASE+0x020},
	/* 22 */ {IOCFG_LM_BASE+0x020},
	/* 23 */ {IOCFG_LM_BASE+0x020},
	/* 24 */ {IOCFG_LM_BASE+0x020},
	/* 25 */ {IOCFG_LM_BASE+0x020},
	/* 26 */ {IOCFG_LM_BASE+0x020},
	/* 27 */ {IOCFG_LM_BASE+0x020},
	/* 28 */ {IOCFG_LM_BASE+0x020},
	/* 29 */ {IOCFG_LM_BASE+0x020},
	/* 30 */ {IOCFG_LM_BASE+0x020},
	/* 31 */ {IOCFG_LM_BASE+0x020},
	/* 32 */ {IOCFG_LM_BASE+0x020},
	/* 33 */ {IOCFG_LM_BASE+0x020},
	/* 34 */ {IOCFG_LM_BASE+0x020},
	/* 35 */ {IOCFG_LB_BASE+0x020},
	/* 36 */ {IOCFG_LB_BASE+0x020},
	/* 37 */ {IOCFG_LB_BASE+0x020},
	/* 38 */ {IOCFG_LB_BASE+0x020},
	/* 39 */ {IOCFG_LB_BASE+0x020},
	/* 40 */ {IOCFG_LB_BASE+0x020},
	/* 41 */ {IOCFG_LB_BASE+0x020},
	/* 42 */ {IOCFG_LB_BASE+0x020},
	/* 43 */ {IOCFG_LB_BASE+0x020},
	/* 44 */ {IOCFG_LB_BASE+0x020},
	/* 45 */ {IOCFG_LB_BASE+0x020},
	/* 46 */ {IOCFG_LB_BASE+0x020},
	/* 47 */ {IOCFG_LB_BASE+0x020},
	/* 48 */ {IOCFG_LB_BASE+0x020},
	/* 49 */ {IOCFG_LB_BASE+0x020},
	/* 50 */ {IOCFG_BL_BASE+0x020},
	/* 51 */ {IOCFG_BL_BASE+0x020},
	/* 52 */ {IOCFG_BL_BASE+0x020},
	/* 53 */ {IOCFG_BL_BASE+0x020},
	/* 54 */ {IOCFG_BL_BASE+0x020},
	/* 55 */ {IOCFG_BL_BASE+0x020},
	/* 56 */ {IOCFG_BL_BASE+0x020},
	/* 57 */ {IOCFG_BL_BASE+0x020},
	/* 58 */ {IOCFG_BL_BASE+0x020},
	/* 59 */ {IOCFG_BL_BASE+0x020},
	/* 60 */ {IOCFG_BL_BASE+0x020},
	/* 61 */ {IOCFG_RB_BASE+0x020},
	/* 62 */ {IOCFG_RB_BASE+0x020},
	/* 63 */ {IOCFG_RB_BASE+0x020},
	/* 64 */ {IOCFG_RB_BASE+0x020},
	/* 65 */ {IOCFG_RB_BASE+0x020},
	/* 66 */ {IOCFG_RB_BASE+0x020},
	/* 67 */ {IOCFG_RB_BASE+0x020},
	/* 68 */ {IOCFG_RB_BASE+0x020},
	/* 69 */ {IOCFG_RB_BASE+0x020},
	/* 70 */ {IOCFG_RB_BASE+0x020},
	/* 71 */ {IOCFG_RB_BASE+0x020},
	/* 72 */ {IOCFG_RB_BASE+0x020},
	/* 73 */ {IOCFG_RB_BASE+0x020},
	/* 74 */ {IOCFG_RB_BASE+0x020},
	/* 75 */ {IOCFG_RB_BASE+0x020},
	/* 76 */ {IOCFG_RB_BASE+0x020},
	/* 77 */ {IOCFG_RB_BASE+0x020},
	/* 78 */ {IOCFG_RB_BASE+0x020},
	/* 79 */ {IOCFG_RB_BASE+0x020},
	/* 80 */ {IOCFG_RB_BASE+0x020},
	/* 81 */ {IOCFG_RB_BASE+0x020},
	/* 82 */ {IOCFG_RB_BASE+0x020},
	/* 83 */ {IOCFG_RB_BASE+0x020},
	/* 84 */ {IOCFG_RB_BASE+0x020},
	/* 85 */ {IOCFG_RB_BASE+0x020},
	/* 86 */ {IOCFG_RB_BASE+0x020},
	/* 87 */ {IOCFG_RB_BASE+0x020},
	/* 88 */ {IOCFG_RB_BASE+0x020},
	/* 89 */ {IOCFG_RM_BASE+0x030},
	/* 90 */ {IOCFG_RM_BASE+0x020},
	/* 91 */ {IOCFG_RM_BASE+0x020},
	/* 92 */ {IOCFG_RM_BASE+0x020},
	/* 93 */ {IOCFG_RM_BASE+0x020},
	/* 94 */ {IOCFG_RM_BASE+0x020},
	/* 95 */ {IOCFG_RM_BASE+0x020},
	/* 96 */ {IOCFG_RM_BASE+0x020},
	/* 97 */ {IOCFG_RM_BASE+0x020},
	/* 98 */ {IOCFG_RM_BASE+0x020},
	/* 99 */ {IOCFG_RM_BASE+0x020},
	/* 100 */ {IOCFG_RM_BASE+0x030},
	/* 101 */ {IOCFG_RM_BASE+0x030},
	/* 102 */ {IOCFG_RM_BASE+0x030},
	/* 103 */ {IOCFG_RM_BASE+0x030},
	/* 104 */ {IOCFG_RM_BASE+0x030},
	/* 105 */ {IOCFG_RM_BASE+0x030},
	/* 106 */ {IOCFG_RM_BASE+0x030},
	/* 107 */ {IOCFG_RT_BASE+0x020},
	/* 108 */ {IOCFG_RT_BASE+0x020},
	/* 109 */ {IOCFG_RT_BASE+0x020},
	/* 110 */ {IOCFG_RT_BASE+0x020},
	/* 111 */ {IOCFG_RT_BASE+0x020},
	/* 112 */ {IOCFG_RT_BASE+0x020},
	/* 113 */ {IOCFG_RT_BASE+0x020},
	/* 114 */ {IOCFG_RT_BASE+0x020},
	/* 115 */ {IOCFG_RT_BASE+0x020},
	/* 116 */ {IOCFG_RT_BASE+0x020},
	/* 117 */ {IOCFG_RT_BASE+0x020},
	/* 118 */ {IOCFG_RT_BASE+0x020},
	/* 119 */ {IOCFG_RT_BASE+0x020},
	/* 120 */ {IOCFG_RT_BASE+0x020},
	/* 121 */ {IOCFG_RT_BASE+0x020},
	/* 122 */ {IOCFG_TL_BASE+0x020},
	/* 123 */ {IOCFG_TL_BASE+0x020},
	/* 124 */ {IOCFG_TL_BASE+0x020},
	/* 125 */ {IOCFG_TL_BASE+0x020},
	/* 126 */ {IOCFG_TL_BASE+0x020},
	/* 127 */ {IOCFG_TL_BASE+0x020},
	/* 128 */ {IOCFG_TL_BASE+0x020},
	/* 129 */ {IOCFG_TL_BASE+0x020},
	/* 130 */ {IOCFG_TL_BASE+0x020},
	/* 131 */ {IOCFG_TL_BASE+0x020},
	/* 132 */ {IOCFG_TL_BASE+0x020},
	/* 133 */ {IOCFG_TL_BASE+0x020},
	/* 134 */ {IOCFG_LT_BASE+0x020},
	/* 135 */ {IOCFG_LT_BASE+0x020},
	/* 136 */ {IOCFG_LT_BASE+0x020},
	/* 137 */ {IOCFG_LT_BASE+0x020},
	/* 138 */ {IOCFG_LT_BASE+0x020},
	/* 139 */ {IOCFG_LT_BASE+0x020},
	/* 140 */ {IOCFG_LT_BASE+0x020},
	/* 141 */ {IOCFG_LT_BASE+0x020},
	/* 142 */ {IOCFG_LT_BASE+0x020},
	/* 143 */ {IOCFG_LT_BASE+0x020},
	/* 144 */ {IOCFG_LT_BASE+0x020},
	/* 145 */ {IOCFG_LT_BASE+0x020},
	/* 146 */ {IOCFG_LT_BASE+0x020},
	/* 147 */ {IOCFG_LT_BASE+0x020},
	/* 148 */ {IOCFG_LT_BASE+0x020},
	/* 149 */ {IOCFG_LT_BASE+0x020},
	/* 150 */ {IOCFG_BL_BASE+0x020},
	/* 151 */ {IOCFG_BL_BASE+0x020}
};


PIN_offset TDSEL_offset[] = {
	/* 0 */ {12},
	/* 1 */ {12},
	/* 2 */ {12},
	/* 3 */ {12},
	/* 4 */ {16},
	/* 5 */ {16},
	/* 6 */ {16},
	/* 7 */ {16},
	/* 8 */ {0},
	/* 9 */ {12},
	/* 10 */ {12},
	/* 11 */ {12},
	/* 12 */ {28},
	/* 13 */ {0},
	/* 14 */ {0},
	/* 15 */ {0},
	/* 16 */ {0},
	/* 17 */ {4},
	/* 18 */ {4},
	/* 19 */ {4},
	/* 20 */ {4},
	/* 21 */ {8},
	/* 22 */ {8},
	/* 23 */ {8},
	/* 24 */ {8},
	/* 25 */ {12},
	/* 26 */ {12},
	/* 27 */ {12},
	/* 28 */ {12},
	/* 29 */ {16},
	/* 30 */ {20},
	/* 31 */ {24},
	/* 32 */ {20},
	/* 33 */ {20},
	/* 34 */ {20},
	/* 35 */ {0},
	/* 36 */ {0},
	/* 37 */ {0},
	/* 38 */ {4},
	/* 39 */ {4},
	/* 40 */ {4},
	/* 41 */ {8},
	/* 42 */ {8},
	/* 43 */ {12},
	/* 44 */ {12},
	/* 45 */ {12},
	/* 46 */ {16},
	/* 47 */ {16},
	/* 48 */ {20},
	/* 49 */ {20},
	/* 50 */ {0},
	/* 51 */ {0},
	/* 52 */ {4},
	/* 53 */ {4},
	/* 54 */ {4},
	/* 55 */ {4},
	/* 56 */ {4},
	/* 57 */ {4},
	/* 58 */ {8},
	/* 59 */ {8},
	/* 60 */ {8},
	/* 61 */ {0},
	/* 62 */ {0},
	/* 63 */ {0},
	/* 64 */ {0},
	/* 65 */ {4},
	/* 66 */ {4},
	/* 67 */ {4},
	/* 68 */ {4},
	/* 69 */ {8},
	/* 70 */ {8},
	/* 71 */ {8},
	/* 72 */ {12},
	/* 73 */ {12},
	/* 74 */ {12},
	/* 75 */ {12},
	/* 76 */ {12},
	/* 77 */ {16},
	/* 78 */ {16},
	/* 79 */ {16},
	/* 80 */ {16},
	/* 81 */ {20},
	/* 82 */ {24},
	/* 83 */ {24},
	/* 84 */ {20},
	/* 85 */ {28},
	/* 86 */ {28},
	/* 87 */ {28},
	/* 88 */ {28},
	/* 89 */ {8},
	/* 90 */ {4},
	/* 91 */ {8},
	/* 92 */ {8},
	/* 93 */ {8},
	/* 94 */ {8},
	/* 95 */ {20},
	/* 96 */ {20},
	/* 97 */ {24},
	/* 98 */ {24},
	/* 99 */ {28},
	/* 100 */ {0},
	/* 101 */ {4},
	/* 102 */ {4},
	/* 103 */ {16},
	/* 104 */ {16},
	/* 105 */ {20},
	/* 106 */ {20},
	/* 107 */ {0},
	/* 108 */ {0},
	/* 109 */ {0},
	/* 110 */ {4},
	/* 111 */ {4},
	/* 112 */ {8},
	/* 113 */ {8},
	/* 114 */ {8},
	/* 115 */ {8},
	/* 116 */ {12},
	/* 117 */ {16},
	/* 118 */ {20},
	/* 119 */ {12},
	/* 120 */ {12},
	/* 121 */ {12},
	/* 122 */ {0},
	/* 123 */ {4},
	/* 124 */ {8},
	/* 125 */ {4},
	/* 126 */ {4},
	/* 127 */ {4},
	/* 128 */ {4},
	/* 129 */ {4},
	/* 130 */ {4},
	/* 131 */ {12},
	/* 132 */ {4},
	/* 133 */ {16},
	/* 134 */ {0},
	/* 135 */ {4},
	/* 136 */ {8},
	/* 137 */ {8},
	/* 138 */ {8},
	/* 139 */ {8},
	/* 140 */ {8},
	/* 141 */ {8},
	/* 142 */ {8},
	/* 143 */ {8},
	/* 144 */ {16},
	/* 145 */ {16},
	/* 146 */ {16},
	/* 147 */ {16},
	/* 148 */ {20},
	/* 149 */ {24},
	/* 150 */ {8},
	/* 151 */ {8}
};


PIN_addr RDSEL_addr[] = {
	/* 0 */ {IOCFG_RM_BASE+0x040},
	/* 1 */ {IOCFG_RM_BASE+0x040},
	/* 2 */ {IOCFG_RM_BASE+0x040},
	/* 3 */ {IOCFG_RM_BASE+0x040},
	/* 4 */ {IOCFG_RM_BASE+0x040},
	/* 5 */ {IOCFG_RM_BASE+0x040},
	/* 6 */ {IOCFG_RM_BASE+0x040},
	/* 7 */ {IOCFG_RM_BASE+0x040},
	/* 8 */ {IOCFG_RM_BASE+0x040},
	/* 9 */ {IOCFG_RM_BASE+0x040},
	/* 10 */ {IOCFG_RM_BASE+0x040},
	/* 11 */ {IOCFG_LT_BASE+0x040},
	/* 12 */ {IOCFG_LT_BASE+0x040},
	/* 13 */ {IOCFG_LM_BASE+0x040},
	/* 14 */ {IOCFG_LM_BASE+0x040},
	/* 15 */ {IOCFG_LM_BASE+0x040},
	/* 16 */ {IOCFG_LM_BASE+0x040},
	/* 17 */ {IOCFG_LM_BASE+0x040},
	/* 18 */ {IOCFG_LM_BASE+0x040},
	/* 19 */ {IOCFG_LM_BASE+0x040},
	/* 20 */ {IOCFG_LM_BASE+0x040},
	/* 21 */ {IOCFG_LM_BASE+0x040},
	/* 22 */ {IOCFG_LM_BASE+0x040},
	/* 23 */ {IOCFG_LM_BASE+0x040},
	/* 24 */ {IOCFG_LM_BASE+0x040},
	/* 25 */ {IOCFG_LM_BASE+0x040},
	/* 26 */ {IOCFG_LM_BASE+0x040},
	/* 27 */ {IOCFG_LM_BASE+0x040},
	/* 28 */ {IOCFG_LM_BASE+0x040},
	/* 29 */ {IOCFG_LM_BASE+0x040},
	/* 30 */ {IOCFG_LM_BASE+0x040},
	/* 31 */ {IOCFG_LM_BASE+0x040},
	/* 32 */ {IOCFG_LM_BASE+0x040},
	/* 33 */ {IOCFG_LM_BASE+0x040},
	/* 34 */ {IOCFG_LM_BASE+0x040},
	/* 35 */ {IOCFG_LB_BASE+0x040},
	/* 36 */ {IOCFG_LB_BASE+0x040},
	/* 37 */ {IOCFG_LB_BASE+0x040},
	/* 38 */ {IOCFG_LB_BASE+0x040},
	/* 39 */ {IOCFG_LB_BASE+0x040},
	/* 40 */ {IOCFG_LB_BASE+0x040},
	/* 41 */ {IOCFG_LB_BASE+0x040},
	/* 42 */ {IOCFG_LB_BASE+0x040},
	/* 43 */ {IOCFG_LB_BASE+0x040},
	/* 44 */ {IOCFG_LB_BASE+0x040},
	/* 45 */ {IOCFG_LB_BASE+0x040},
	/* 46 */ {IOCFG_LB_BASE+0x040},
	/* 47 */ {IOCFG_LB_BASE+0x040},
	/* 48 */ {IOCFG_LB_BASE+0x040},
	/* 49 */ {IOCFG_LB_BASE+0x040},
	/* 50 */ {IOCFG_BL_BASE+0x040},
	/* 51 */ {IOCFG_BL_BASE+0x040},
	/* 52 */ {IOCFG_BL_BASE+0x040},
	/* 53 */ {IOCFG_BL_BASE+0x040},
	/* 54 */ {IOCFG_BL_BASE+0x040},
	/* 55 */ {IOCFG_BL_BASE+0x040},
	/* 56 */ {IOCFG_BL_BASE+0x040},
	/* 57 */ {IOCFG_BL_BASE+0x040},
	/* 58 */ {IOCFG_BL_BASE+0x040},
	/* 59 */ {IOCFG_BL_BASE+0x040},
	/* 60 */ {IOCFG_BL_BASE+0x040},
	/* 61 */ {IOCFG_RB_BASE+0x040},
	/* 62 */ {IOCFG_RB_BASE+0x040},
	/* 63 */ {IOCFG_RB_BASE+0x040},
	/* 64 */ {IOCFG_RB_BASE+0x040},
	/* 65 */ {IOCFG_RB_BASE+0x040},
	/* 66 */ {IOCFG_RB_BASE+0x040},
	/* 67 */ {IOCFG_RB_BASE+0x040},
	/* 68 */ {IOCFG_RB_BASE+0x040},
	/* 69 */ {IOCFG_RB_BASE+0x040},
	/* 70 */ {IOCFG_RB_BASE+0x040},
	/* 71 */ {IOCFG_RB_BASE+0x040},
	/* 72 */ {IOCFG_RB_BASE+0x040},
	/* 73 */ {IOCFG_RB_BASE+0x040},
	/* 74 */ {IOCFG_RB_BASE+0x040},
	/* 75 */ {IOCFG_RB_BASE+0x040},
	/* 76 */ {IOCFG_RB_BASE+0x040},
	/* 77 */ {IOCFG_RB_BASE+0x040},
	/* 78 */ {IOCFG_RB_BASE+0x040},
	/* 79 */ {IOCFG_RB_BASE+0x040},
	/* 80 */ {IOCFG_RB_BASE+0x040},
	/* 81 */ {IOCFG_RB_BASE+0x040},
	/* 82 */ {IOCFG_RB_BASE+0x040},
	/* 83 */ {IOCFG_RB_BASE+0x040},
	/* 84 */ {IOCFG_RB_BASE+0x040},
	/* 85 */ {IOCFG_RB_BASE+0x040},
	/* 86 */ {IOCFG_RB_BASE+0x040},
	/* 87 */ {IOCFG_RB_BASE+0x040},
	/* 88 */ {IOCFG_RB_BASE+0x040},
	/* 89 */ {IOCFG_RM_BASE+0x040},
	/* 90 */ {IOCFG_RM_BASE+0x040},
	/* 91 */ {IOCFG_RM_BASE+0x040},
	/* 92 */ {IOCFG_RM_BASE+0x040},
	/* 93 */ {IOCFG_RM_BASE+0x040},
	/* 94 */ {IOCFG_RM_BASE+0x040},
	/* 95 */ {IOCFG_RM_BASE+0x040},
	/* 96 */ {IOCFG_RM_BASE+0x040},
	/* 97 */ {IOCFG_RM_BASE+0x040},
	/* 98 */ {IOCFG_RM_BASE+0x040},
	/* 99 */ {IOCFG_RM_BASE+0x040},
	/* 100 */ {IOCFG_RM_BASE+0x040},
	/* 101 */ {IOCFG_RM_BASE+0x040},
	/* 102 */ {IOCFG_RM_BASE+0x040},
	/* 103 */ {IOCFG_RM_BASE+0x040},
	/* 104 */ {IOCFG_RM_BASE+0x040},
	/* 105 */ {IOCFG_RM_BASE+0x040},
	/* 106 */ {IOCFG_RM_BASE+0x040},
	/* 107 */ {IOCFG_RT_BASE+0x040},
	/* 108 */ {IOCFG_RT_BASE+0x040},
	/* 109 */ {IOCFG_RT_BASE+0x040},
	/* 110 */ {IOCFG_RT_BASE+0x040},
	/* 111 */ {IOCFG_RT_BASE+0x040},
	/* 112 */ {IOCFG_RT_BASE+0x040},
	/* 113 */ {IOCFG_RT_BASE+0x040},
	/* 114 */ {IOCFG_RT_BASE+0x040},
	/* 115 */ {IOCFG_RT_BASE+0x040},
	/* 116 */ {IOCFG_RT_BASE+0x040},
	/* 117 */ {IOCFG_RT_BASE+0x040},
	/* 118 */ {IOCFG_RT_BASE+0x040},
	/* 119 */ {IOCFG_RT_BASE+0x040},
	/* 120 */ {IOCFG_RT_BASE+0x040},
	/* 121 */ {IOCFG_RT_BASE+0x040},
	/* 122 */ {IOCFG_TL_BASE+0x040},
	/* 123 */ {IOCFG_TL_BASE+0x040},
	/* 124 */ {IOCFG_TL_BASE+0x040},
	/* 125 */ {IOCFG_TL_BASE+0x040},
	/* 126 */ {IOCFG_TL_BASE+0x040},
	/* 127 */ {IOCFG_TL_BASE+0x040},
	/* 128 */ {IOCFG_TL_BASE+0x040},
	/* 129 */ {IOCFG_TL_BASE+0x040},
	/* 130 */ {IOCFG_TL_BASE+0x040},
	/* 131 */ {IOCFG_TL_BASE+0x040},
	/* 132 */ {IOCFG_TL_BASE+0x040},
	/* 133 */ {IOCFG_TL_BASE+0x040},
	/* 134 */ {IOCFG_LT_BASE+0x040},
	/* 135 */ {IOCFG_LT_BASE+0x040},
	/* 136 */ {IOCFG_LT_BASE+0x040},
	/* 137 */ {IOCFG_LT_BASE+0x040},
	/* 138 */ {IOCFG_LT_BASE+0x040},
	/* 139 */ {IOCFG_LT_BASE+0x040},
	/* 140 */ {IOCFG_LT_BASE+0x040},
	/* 141 */ {IOCFG_LT_BASE+0x040},
	/* 142 */ {IOCFG_LT_BASE+0x040},
	/* 143 */ {IOCFG_LT_BASE+0x040},
	/* 144 */ {IOCFG_LT_BASE+0x040},
	/* 145 */ {IOCFG_LT_BASE+0x040},
	/* 146 */ {IOCFG_LT_BASE+0x040},
	/* 147 */ {IOCFG_LT_BASE+0x040},
	/* 148 */ {IOCFG_LT_BASE+0x040},
	/* 149 */ {IOCFG_LT_BASE+0x040},
	/* 150 */ {IOCFG_BL_BASE+0x040},
	/* 151 */ {IOCFG_BL_BASE+0x040}
};


PIN_offset RDSEL_offset[] = {
	/* 0 */ {6},
	/* 1 */ {6},
	/* 2 */ {6},
	/* 3 */ {6},
	/* 4 */ {8},
	/* 5 */ {8},
	/* 6 */ {8},
	/* 7 */ {8},
	/* 8 */ {0},
	/* 9 */ {22},
	/* 10 */ {22},
	/* 11 */ {6},
	/* 12 */ {14},
	/* 13 */ {0},
	/* 14 */ {0},
	/* 15 */ {0},
	/* 16 */ {0},
	/* 17 */ {2},
	/* 18 */ {2},
	/* 19 */ {2},
	/* 20 */ {2},
	/* 21 */ {4},
	/* 22 */ {4},
	/* 23 */ {4},
	/* 24 */ {4},
	/* 25 */ {6},
	/* 26 */ {6},
	/* 27 */ {6},
	/* 28 */ {6},
	/* 29 */ {8},
	/* 30 */ {14},
	/* 31 */ {20},
	/* 32 */ {14},
	/* 33 */ {14},
	/* 34 */ {14},
	/* 35 */ {0},
	/* 36 */ {0},
	/* 37 */ {0},
	/* 38 */ {6},
	/* 39 */ {6},
	/* 40 */ {6},
	/* 41 */ {12},
	/* 42 */ {12},
	/* 43 */ {14},
	/* 44 */ {14},
	/* 45 */ {14},
	/* 46 */ {16},
	/* 47 */ {16},
	/* 48 */ {18},
	/* 49 */ {18},
	/* 50 */ {0},
	/* 51 */ {0},
	/* 52 */ {2},
	/* 53 */ {2},
	/* 54 */ {2},
	/* 55 */ {2},
	/* 56 */ {2},
	/* 57 */ {2},
	/* 58 */ {4},
	/* 59 */ {4},
	/* 60 */ {4},
	/* 61 */ {0},
	/* 62 */ {0},
	/* 63 */ {0},
	/* 64 */ {0},
	/* 65 */ {2},
	/* 66 */ {2},
	/* 67 */ {2},
	/* 68 */ {2},
	/* 69 */ {4},
	/* 70 */ {4},
	/* 71 */ {4},
	/* 72 */ {6},
	/* 73 */ {6},
	/* 74 */ {6},
	/* 75 */ {6},
	/* 76 */ {6},
	/* 77 */ {8},
	/* 78 */ {8},
	/* 79 */ {8},
	/* 80 */ {8},
	/* 81 */ {10},
	/* 82 */ {12},
	/* 83 */ {12},
	/* 84 */ {10},
	/* 85 */ {14},
	/* 86 */ {14},
	/* 87 */ {14},
	/* 88 */ {14},
	/* 89 */ {20},
	/* 90 */ {2},
	/* 91 */ {4},
	/* 92 */ {4},
	/* 93 */ {4},
	/* 94 */ {4},
	/* 95 */ {10},
	/* 96 */ {10},
	/* 97 */ {12},
	/* 98 */ {12},
	/* 99 */ {14},
	/* 100 */ {16},
	/* 101 */ {18},
	/* 102 */ {18},
	/* 103 */ {24},
	/* 104 */ {24},
	/* 105 */ {26},
	/* 106 */ {26},
	/* 107 */ {0},
	/* 108 */ {0},
	/* 109 */ {0},
	/* 110 */ {6},
	/* 111 */ {6},
	/* 112 */ {8},
	/* 113 */ {8},
	/* 114 */ {8},
	/* 115 */ {8},
	/* 116 */ {10},
	/* 117 */ {16},
	/* 118 */ {22},
	/* 119 */ {10},
	/* 120 */ {10},
	/* 121 */ {10},
	/* 122 */ {0},
	/* 123 */ {6},
	/* 124 */ {12},
	/* 125 */ {6},
	/* 126 */ {6},
	/* 127 */ {6},
	/* 128 */ {6},
	/* 129 */ {6},
	/* 130 */ {6},
	/* 131 */ {18},
	/* 132 */ {6},
	/* 133 */ {24},
	/* 134 */ {0},
	/* 135 */ {2},
	/* 136 */ {4},
	/* 137 */ {4},
	/* 138 */ {4},
	/* 139 */ {4},
	/* 140 */ {4},
	/* 141 */ {4},
	/* 142 */ {4},
	/* 143 */ {4},
	/* 144 */ {8},
	/* 145 */ {8},
	/* 146 */ {8},
	/* 147 */ {8},
	/* 148 */ {10},
	/* 149 */ {12},
	/* 150 */ {4},
	/* 151 */ {4}
};

#endif //_GPIO_CFG_H_